MCP2140A-I/SS Microchip Technology, MCP2140A-I/SS Datasheet - Page 9

• Manufacturer Part Number: MCP2140A-I/SS
• Description: IC IRDA CONTROLLR DTE/DCE 20SSOP
• Manufacturer: Microchip Technology

Specifications of MCP2140A-I/SS

• Interface: UART
• Controller Type: IRDA Standard Protocol Stack Controller
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 2.2mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Supply Voltage Range: 3V To 5.5V
• Power Dissipation Pd: 800mW
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Svhc: No SVHC (15-Dec-2010)
• Interface Type: UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP2140DM-TMPSNS - BOARD DEMO FOR MCP2140
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2.4
The Host UART interface communicates with the Host
Controller. This interface has eight signals associated
with it: TX, RX, RTS, CTS, DSR, DTR, CD and RI.
Several of these signals are locally generated (not
passed over the IR interface). The Host UART is a
full-duplex interface, meaning that the system can
transmit and receive simultaneously.
2.4.1
The baud rate for the MCP2140A serial port (the TX
and RX pins) is fixed at 9600 baud when the device
frequency is 3.6864 MHz.
2.4.2
When the Host Controller sends serial data to the
MCP2140A, the Host Controller’s baud rate is required
to match the baud rate of the MCP2140A’s serial port.
2.4.3
When the Host Controller receives serial data from the
MCP2140A, the Host Controller’s baud rate is required
to match the baud rate of the MCP2140A’s serial port.
2.4.4
There are three Host UART signals used to control the
handshaking operation between the Host Controller
and the MCP2140A. They are:
• DSR
• RTS
• CTS
© 2007 Microchip Technology Inc.
Note 1: The
2: The MCP2140A emulates a 3-wire serial
3: The RTS and CTS signals are local
Host UART Interface
BAUD RATE
TRANSMITTING
RECEIVING
HARDWARE HANDSHAKING
non-data signals locally.
connection (TXD, RXD and GND). The
transceiver’s
Receive Data (RXD) signals, and the
state of the CD. RI and DTR input pins are
carried back and forth to the Primary
device.
emulations.
MCP2140A
Transmit
generates
Data
several
(TXD),
2.4.4.1
The DSR signal indicates that the MCP2140A has
established a link between the MCP2140A and the
Primary Device. Please refer to
Devices Connect”
2.4.4.2
The RTS signal indicates to the MCP2140A that the
Host Controller is ready to receive serial data.
Once an IR packet with “data“ has been received by the
MCP2140A, the RTS signal will need to be low for the
received data to be transferred to the Host Controller. If
the RTS signal remains high, an IR link timeout will
occur and the MCP2140A will disconnect from the
Primary Device.
2.4.4.3
The CTS signal indicates that the MCP2140A UART
Receive Buffer is full. The MCP2140A generates the
CTS signal locally.
The MCP2140A UART Receive Buffer is 60 bytes and
the CTS signal will be driven high once 59 bytes have
been received.
After the MCP2140A UART has received a byte, there
is a latency before the CTS signal is driven high, if the
UART Receive Buffer has 59 bytes. The MCP2140A
then supports the reception of another byte (the 60th
byte). This allows a byte was being received when CTS
was driven high not to be lost. The MCP2140A UART
Receive Buffer supports 60 bytes, regardless if the last
byte started transmission before or after the CTS signal
was driven high.
The MCP2140A has a buffer for incoming data from the
IR Host. This buffer supports the 60-byte data payload
plus the memory overhead of the packet. Another
60 byte buffer is provided to buffer data from the UART
serial port. The MCP2140A can handle IR data and
Host UART serial port data simultaneously. A hardware
handshaking pin (CTS) is provided to inhibit the Host
Controller from sending serial data when the Host
UART buffer is not available.
states while
signal when the Host controller streams 250 bytes to
the MCP2140A.
UART flow control using the CTS signal.
Note:
When the CTS output signal goes high, the
UART FIFO will store up to 1 additional
byte, for a maximum of 60 bytes.
Figure 2-4
DSR
RTS
CTS
Figure 2-5
for more information.
shows an example of the CTS
MCP2140A
shows a flow chart for Host
Figure 2-3
Appendix B: “How
DS22050A-page 9
shows CTS