MCP2510-E/P Microchip Technology, MCP2510-E/P Datasheet - Page 32
![IC CAN CTLR EXTENDED TEMP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
MCP2510-E/P
Manufacturer Part Number
MCP2510-E/P
Description
IC CAN CTLR EXTENDED TEMP 18DIP
Manufacturer
Microchip Technology
Specifications of MCP2510-E/P
Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
No. Of Tx Buffers
3
No. Of Rx Buffers
2
No. Of Filters
6
No. Of Masks
2
No. Of Interrupts
1
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
DIP
No. Of Pins
18
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
MCP2510-E/PR
MCP2510-E/PR
MCP2510-E/PR
MCP2510
REGISTER 4-13:
REGISTER 4-14:
REGISTER 4-15:
DS21291F-page 32
bit 7-0
bit 7-0
bit 7-5
bit 4-2
bit 1-0
RXF
(ADDRESS: 03h, 07h, 0Bh, 13h, 17h, 1Bh)
RXM
(ADDRESS: 20h, 24h)
RXM
(ADDRESS: 21h, 25h)
bit 7
bit 7
bit 7
EID<7:0>: Extended Identifier Bits <7:0>
These bits hold the filter bits to be applied to the bits <7:0> of the Extended Identifier portion of
a received message
Legend:
R = Readable bit
-n = Value at POR
SID<10:3>: Standard Identifier Mask Bits <10:3>
These bits hold the mask bits to be applied to bits <10:3> of the Standard Identifier portion of a
received message
Legend:
R = Readable bit
-n = Value at POR
SID<2:0>: Standard Identifier Mask Bits <2:0>
These bits hold the mask bits to be applied to bits<2:0> of the Standard Identifier portion of a
received message
Unimplemented: Reads as '0'
EID<17:16>: Extended Identifier Mask Bits <17:16>
These bits hold the mask bits to be applied to bits <17:16> of the Extended Identifier portion of
a received message
Legend:
R = Readable bit
-n = Value at POR
R/W-x
R/W-x
SID10
R/W-x
EID7
SID2
N
N
N
EID0 - ACCEPTANCE FILTER
SIDH - ACCEPTANCE FILTER MASK
SIDL - ACCEPTANCE FILTER MASK
R/W-x
R/W-x
R/W-x
EID6
SID1
SID9
R/W-x
R/W-x
R/W-x
EID5
SID8
SID0
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
R/W-x
R/W-x
EID4
SID7
U-0
—
N
EXTENDED IDENTIFIER LOW
R/W-x
R/W-x
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
N
EID3
SID6
N
U-0
—
STANDARD IDENTIFIER LOW
STANDARD IDENTIFIER HIGH
R/W-x
R/W-x
EID2
SID5
U-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-x
EID17
EID1
SID4
R/W-x
R/W-x
R/W-x
EID16
EID0
SID3
bit 0
bit 0
bit 0