CY7C63823-SXC Cypress Semiconductor Corp, CY7C63823-SXC Datasheet - Page 15
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CY7C63823-SXC
Manufacturer Part Number
CY7C63823-SXC
Description
IC USB PERIPHERAL CTRLR 24-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet
1.CY7C63310-SXC.pdf
(86 pages)
Specifications of CY7C63823-SXC
Controller Type
USB Peripheral Controller
Interface
USB
Voltage - Supply
4 V ~ 5.5 V
Current - Supply
40mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
No. Of I/o's
20
Ram Memory Size
256Byte
Cpu Speed
24MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Supply Voltage Range
4V To 5.5V
Core Size
8 Bit
Program Memory Size
8KB
Embedded Interface Type
PS/2, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C63823-SXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
9.2 Data Memory Organization
The CY7C63310/638xx microcontrollers provide up to 256 bytes of data RAM.
9.3 Flash
This section describes the flash block of the enCoRe II. Much of
the user visible flash functionality including programming and
security are implemented in the M8C Supervisory Read Only
Memory (SROM). The enCoRe II flash has an endurance of 1000
cycles and a 10 year data retention capability.
9.3.1 Flash Programming and Security
All flash programming is performed by code in the SROM. The
registers that control the flash programming are only visible to
the M8C CPU when it executes out of SROM. This makes it
impossible to read, write or erase the flash by bypassing the
security mechanisms implemented in the SROM.
Customer firmware can program the flash only through SROM
calls. The data or code images are sourced through any interface
with the appropriate support firmware. This type of programming
requires a ‘boot-loader’, which is a piece of firmware resident on
the flash. For safety reasons this boot-loader must not be
overwritten during firmware rewrites.
The flash provides four extra auxiliary rows that are used to hold
flash block protection flags, boot time calibration values,
configuration tables, and any device values. The routines for
accessing these auxiliary rows are documented in the section
SROM on page 15
by the device erase function.
9.3.2 In System Programming
Most designs that include an enCoRe II part have a USB
connector attached to the USB D+ and D– pins on the device.
These designs require the ability to program or reprogram a part
through the USB D+ and D– pins alone.
The enCoRe II devices enable this type of in system
programming by using the D+ and D– pins as the serial
programming mode interface. This allows an external controller
Document 38-08035 Rev. *N
Top of RAM Memory
after reset
8-bit PSP
section. The auxiliary rows are not affected
Figure 9-2. Data Memory Organization
Address
0xFF
0x00
Stack begins here and grows upward.
to enable the enCoRe II part to enter the serial programming
mode, and then use the test queue to issue flash access
functions in the SROM. The programming protocol is not USB.
9.4 SROM
The SROM holds code that boots the part, calibrates circuitry,
and performs flash operations
SROM functions). The functions of the SROM are accessed in
the normal user code or operating from flash. The SROM exists
in a separate memory space from the user code. The SROM
functions are accessed by executing the Supervisory System
Call instruction (SSC), which has an opcode of 00h. Before
executing the SSC the M8C’s accumulator must be loaded with
the desired SROM function code from
Undefined functions cause a HALT if called from the user code.
The SROM functions are executing code with calls; as a result,
the functions require stack space. With the exception of Reset,
all of the SROM functions have a parameter block in SRAM that
must be configured before executing the SSC.
16
each parameter, with regards to a specific SROM function, is
described later in this section.
Table 9-1. SROM Function Codes
00h
01h
02h
03h
05h
06h
07h
Function Code
lists all possible parameter block variables. The meaning of
ReadBlock
WriteBlock
EraseBlock
EraseAll
TableRead
CheckSum
SWBootReset
CY7C63310, CY7C638xx
Function Name
(Table 9-1 on page 15
Table 9-1 on page
Table 9-2 on page
Stack Space
Page 15 of 86
10
11
0
7
9
3
3
lists the
15.
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