Z8523008PSG Zilog, Z8523008PSG Datasheet - Page 96
![IC 8MHZ ESCC 40-DIP](/photos/6/57/65796/269-40-dip_sml.jpg)
Z8523008PSG
Manufacturer Part Number
Z8523008PSG
Description
IC 8MHZ ESCC 40-DIP
Manufacturer
Zilog
Datasheet
1.Z8523008PSG.pdf
(117 pages)
Specifications of Z8523008PSG
Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
4mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Operating Supply Voltage
5 V
Supply Current (max)
9 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3917
Z8523008PSG
Z8523008PSG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8523008PSG
Manufacturer:
Zilog
Quantity:
177
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Table 46. Z85230 AC Characteristics (Continued)
PS005303-0907
No
35a
35b
36
37
38
39
40
41
42
43
44
45
46
47
48
Symbol
TdWRr(REQ
)
TdWRr(REQ
)
TdRDr(REQ) RD Rise to DTR/
TdPC(INT)
TdIAi(RD)
TwRDA
TdRDA(DR) RD Fall (ACK) to
TsIEI(RDA)
ThIEI(RDA)
TdIEI(IEO)
TdPC(IEO)
TdRDA(INT) RD Fall to INT
TdRD(WRQ) RD Rise to WR
TdWRQ(RD) WR Rise to RD
TwRES
Parameter
WR Fall to DTR/
REQ Not Valid
WR Fall to DTR/
REQ Not Valid
REQ Not Valid
Delay
PCLK Fall to INT
Valid Delay
INTACK to RD Fall
(ACK) Delay
RD (Acknowledge)
Width
Read Data Valid
Delay
IEI to RD Fall
(ACK) Setup Time
IEI to RD Rise
(Ack) Hold Time
IEI to IEO Delay
Time
PCLK Rise to IEO
Delay
Inactive Delay
Fall Delay for No
Reset
Fall Delay for No
Reset
WR and RD Low
for Reset
6
Min
145
145
135
95
0
15
15
145
8.5 MHz
Max
4
168
NA
500
95
195
480
90
125
120
95
0
15
15
100
Min
10 MHz
Max
4
100
NA
320
90
175
320
50
75
70
50
0
10
10
75
Min
16 MHz
Max
4
50
NA
175
45
80
200
Product Specification
Electrical Characteristics
Min
45
65
60
45
0
10
10
65
20 MHz
Z85230/Z80230
Max
4
50
NA
160
40
80
180
Notes
7
5, 6
6
6
4, 6
6
6
6
6
6
6
3, 6
6
6
6
91
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