USB2503A-HZH SMSC, USB2503A-HZH Datasheet - Page 12

• Manufacturer Part Number: USB2503A-HZH
• Description: IC HUB 3PORT USB COMPATBL 48-QFN
• Manufacturer: SMSC
• Type: Integrated USB Compatible 3 Port Hubr

Specifications of USB2503A-HZH

• Controller Type: USB Hub
• Interface: Serial EEPROM
• Voltage - Supply: 1.62 V ~ 3.6 V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1030

Revision 2.3 (08-27-07)
Crystal Output
VDDAPLL3P3
RESET Input
Internal 1.8V
VDDPLL1P8
Self-Power /
Analog Test
Clock Input
Bus-Power
TEST Pins
VDDA3P3
regulator
VDD1P8
Enable
voltage
enable
NAME
Detect
NAME
&
VDDA18PLL
VDDA33PLL
SELF_PWR
CLKIN_EN
RESET_N
TEST[1:0]
SYMBOL
SYMBOL
REG_EN
VDDA33
ATEST/
VDD18
XTAL2
Table 4.4 Power, Ground, and No Connect
Table 4.3 Miscellaneous Pins (continued)
OCLKx
TYPE
TYPE
IPD
AIO
IS
I
I
DATASHEET
12
24MHz Crystal
This is the other terminal of the crystal, or left
unconnected when an external clock source is used to
drive XTAL1/CLKIN. It must not be used to drive any
external circuitry other than the crystal circuit.
Clock In Enable:
Low = XTAL1 and XTAL2 pins configured for use with
external crystal
High = XTAL1 pin configured as CLKIN, and must be
driven by an external CMOS clock.
This active low signal is used by the system to reset the
chip. The minimum active low pulse is 100ns.
Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., 7-
Port Hub gets all power from Upstream USB VBus).
High = Self/local power source is available.
Used for testing the chip. User must treat as a no-
connect or connect to ground. For board testing, all
signal pins are included in an XNOR chain, Please see
Chapter 6, "XNOR Test," on page 37
the configuration and use of the XNOR mode.
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA3P3 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin
functions as a test pin.
+1.8V core power.
If the internal regulator is enabled, then VDD18 pin
closest to VDD33CR must have a 4.7
±20% (ESR <0.1
+1.8V Filtered analog power for internal PLL.
If the internal regulator is enabled, then this pin must
have a 4.7
to VSS
+3.3V Filtered analog power for the internal PLL
If the internal PLL 1.8V regulator is enabled, then this pin
acts as the regulator input
+3.3V Filtered analog power.
μ
F (or greater) ±20% (ESR <0.1
Ω)
Integrated USB 2.0 Compatible 3-Port Hub
capacitor to VSS
FUNCTION
FUNCTION
SMSC USB2503/USB2503A
for more details on
μ
F (or greater)
Ω)
capacitor
Datasheet