USB2524-ABZJ SMSC, USB2524-ABZJ Datasheet - Page 20
![IC USB 2.0 MULTISWITCH HUB 56QFN](/photos/6/81/68189/usb2524-abzj_sml.jpg)
USB2524-ABZJ
Manufacturer Part Number
USB2524-ABZJ
Description
IC USB 2.0 MULTISWITCH HUB 56QFN
Manufacturer
SMSC
Datasheet
1.USB2524-ABZJ.pdf
(57 pages)
Specifications of USB2524-ABZJ
Controller Type
USB Hub
Interface
Serial EEPROM
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
For Use With
638-1044 - BOARD EVAL USB2524 SHARE/SWITCH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1056-6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
USB2524-ABZJ
Manufacturer:
Freescale
Quantity:
26
Company:
Part Number:
USB2524-ABZJ
Manufacturer:
SMSC
Quantity:
996
Chapter 7 Configuration Options
Revision 1.91 (08-22-07)
7.1
7.1.1
7.1.2
7.1.3
7.1.4
REG ADDR
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
The SMSC Hub supports a large number of features (some are mutually exclusive), and must be
configured in order to correctly function when attached to a USB host controller. There are three
principal ways to configure the hub: SMBus, EEPROM, or by internal default settings (with or without
pin strapping option over-rides). In all cases, the configuration method will be determined by the
CFG_SEL2, CFG_SEL1 and CFG_SEL0 pins immediately after RESET_N negation.
Power Switching Polarity
The selection of active state “polarity” for the PRTPWR pins is made by a strapping option only (the
PRTPWR_POL pin).
VBus Detect
According to Section 7.2.1 of the USB 2.0 Specification, a downstream port can never provide power
to its D+ or D- pull-up resistors unless the upstream port’s VBUS is in the asserted (powered) state.
The VBUS_DET pin on the Hub monitors the state of the upstream VBUS signal and will not pull-up
the D+ resistor if VBUS is not active. If VBUS goes from an active to an inactive state (Not Powered),
Hub will remove power from the D+ pull-up resistor within 10 seconds.
Port Assignment Configuration:
The order of precedence for control of ownership of each port is as follows:
1. CFG_SEL0 and CFG_SEL1.
2. PRT_ASSIGN_CFG register
3. PRT_ASSIGN_MODE register
4. PRT_LCK register
5. The applicable PORT_ASSIGN_INTxx or PORT_ASSIGN_xx register (based on the settings
Note: The PRT_LCK register will primarily be used when in SMBus mode, but is available for use in
Internal Register Set (Common to EEPROM and SMBus)
Switching Hub Configuration Options
above).
EEPROM Configuration, When the EEPROM port assignment values are loaded, the
PRT_LCK will be temporarily suspended, then after the configuration is loaded, the PRT_LCK
function will be enabled.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 7.1 Internal EEPROM & SMBus Register Memory Map
Non-Removable Devices
Config Data Byte 1
Config Data Byte 2
Config Data Byte 3
REGISTER NAME
DATASHEET
VID MSB
PID MSB
DID MSB
VID LSB
PID LSB
DID LSB
20
ABBR
CFG1
CFG2
CFG3
VIDM
PIDM
DIDM
VIDL
PIDL
DIDL
NRD
USB MultiSwitch
DEFAULT
SMSC USB2524
ROM
9Bh
24h
04h
24h
25h
00h
00h
10h
00h
00h
Datasheet
TM
Hub