DS2482S-800+ Maxim Integrated Products, DS2482S-800+ Datasheet - Page 11

IC I2C TO 1WIRE BRIDGE 16SOIC

DS2482S-800+

Manufacturer Part Number
DS2482S-800+
Description
IC I2C TO 1WIRE BRIDGE 16SOIC
Manufacturer
Maxim Integrated Products
Type
Eight Channel 1 Wire Masterr
Datasheets

Specifications of DS2482S-800+

Controller Type
I²C Bus Controller
Interface
I²C
Voltage - Supply
3.3 V, 5V
Current - Supply
750µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Package
16SOIC N
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 4. 1-Wire Reset/Presence-Detect Cycle
Table 2. Bit Allocation in the Bit Byte
x = Don’t care.
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
BIT 7
V
V
V
IH1
CC
IL1
0V
V
t
F1
______________________________________________________________________________________
BIT 6
x
87h
Bit Byte
Generates a single 1-Wire time slot with a bit value “V” as specified by the bit byte at the 1-Wire
line (see Table 2). A V value of 0b generates a write-zero time slot (Figure 5); a V value of 1b
generates a write-one time slot, which also functions as a read-data time slot (Figure 6). In either
case, the logic level at the 1-Wire line is tested at t
To perform single-bit writes or reads at the 1-Wire line when single bit communication is
necessary (the exception).
1-Wire activity must have ended before the DS2482-100 can process this command.
Command code and bit byte are not acknowledged if 1WB = 1 at the time the command code is
received and the command is ignored.
t
Begins maximum 262.5ns after the falling SCL edge of the MSB of the bit byte.
Status Register (for busy polling and data reading).
1WB (set to 1 for t
1WS, APU, SPU apply.
SLOT
RESET PULSE
PULLUP
t
RSTL
+ maximum 262.5ns, counted from the falling SCL edge of the first bit (MSB) of the bit byte.
BIT 5
x
APU CONTROLLED
SLOT
Single-Channel 1-Wire Master
EDGE
), SBR is updated at t
BIT 4
x
DS2482-100 PULLDOWN
t
SI
BIT 3
x
PRESENCE/SHORT DETECT
MSR
, DIR (may change its state).
t
RSTH
MSR
BIT 2
and SBR is updated.
t
MSP
x
RESISTIVE PULLUP
1-Wire SLAVE PULLDOWN
PRESENCE PULSE
BIT 1
x
1-Wire Single Bit
BIT 0
x
11

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