SI3452-B01-GM Silicon Laboratories Inc, SI3452-B01-GM Datasheet

IC POE CONTROLLER MIDSPAN 40QFN

SI3452-B01-GM

Manufacturer Part Number
SI3452-B01-GM
Description
IC POE CONTROLLER MIDSPAN 40QFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3452-B01-GM

Package / Case
40-QFN
Controller Type
Power over Ethernet Controller (POE)
Interface
I²C
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
14mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Power Dissipation
1.2 W
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3at, IEEE 802.3af
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
14 mA
Maximum Operating Temperature
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1829-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3452-B01-GM
Manufacturer:
SILICON
Quantity:
1 000
Q
FOR
Features
Applications
Rev. 1.2 12/10
Each Si3452 high-voltage port
controller supports four PSE power
interfaces
Programmable current limits for PoE
(15.4 W), PoE+ (30 W), and
proprietary systems (up to 40 W) per
port
I
MCU for easy, low-cost management
of 4 to 48 ports by the host system
Unique mixed-signal IC high-voltage
component integration simplifies
design, lowers power dissipation,
minimizes external BOM, and
reduces PCB footprint



Industrial (–40 to 85 °C) operating
temperature
Compact, 6×6 mm
RoHS-compliant package
Power over Ethernet Endpoint
switches and Midspans for IEEE Std
802.3af and 802.3at
Supports high-power PDs, such as:



Security and RFID systems
UAD
2
C interface requires no external
current-sense circuitry
suppressors
sensing methods
Internal low-R
Integrated transient voltage surge
Proprietary dV/dt disconnect
Pan/Tilt/Zoom security cameras
802.11n WAPs
Multi-band, multi-radio WAPs
P
O
H
E
IGH
ON
2
AND
, 40-pin QFN
power FETs with
- V
O L TAG E
P
O
E+ PSE
Copyright © 2010 by Silicon Laboratories
Programmable architecture supports
IEEE 802.3af (PoE) and IEEE
802.3at (PoE+) PSEs





Comprehensive, robust, fault-
protection circuitry





Industrial automation systems
Networked audio
IP Phone Systems and iPBXs
Metropolitan area networked WAPs,
cameras, and sensors
WiMAX ASN/BTS and CPE/ODU
systems
Programmable current limits for
PoE (350 mA) and PoE+
(600 mA), and custom limits to
850 mA
Per-port current and voltage
monitoring for sophisticated power
management and control
Power policing mode
Robust multi-point detection
Supports 1-Event and 2-Event
classification algorithms
Supply undervoltage lockout
(UVLO)
Output current limit and short-
circuit protection
Foldback current limiting
Dual-threshold thermal overload
protection
Fault source reporting for
intelligent port management
P
O RT
S
C
O N T R O L L E R
See "9. Pin Descriptions" on page 28.
RBIAS
AGND
AGND
VREF
AOUT
VEE1
VEE4
VEE
AIN
NC
Ordering Information:
10
1
2
3
4
5
6
7
8
9
Pin Assignments
See page 31.
40-Pin QFN
(Top View)
Si3452
Si3452
22
21
30
29
28
27
26
25
24
23
Si3452
VDD
DGND
AD0
AD1
AD2
AD2
AD3
RST
VEE3
AD3

Related parts for SI3452-B01-GM

SI3452-B01-GM Summary of contents

Page 1

... UAD IGH O L TAG FOR O AND O Features  Each Si3452 high-voltage port controller supports four PSE power interfaces  Programmable current limits for PoE (15.4 W), PoE+ (30 W), and proprietary systems ( per port 2  interface requires no external MCU for easy, low-cost management ports by the host system  ...

Page 2

... To maximize system design flexibility and minimize cost, each Si3452 connects directly to a system host controller 2 through serial interface, eliminating the need for an external MCU. The Si3452 can be set to one of 12 unique addresses, allowing control ports on a single I Functional Block Diagram MCU Core & ...

Page 3

... C Address ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8.4. Reading or Writing Unused Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10. Package Outline: 40-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 11. Recommended PCB Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 12. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 12.1. Evaluation Kits and Reference Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 13. Device Marking Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Rev. 1.2 Si3452 Page 3 ...

Page 4

... Si3452 1. Electrical Specifications Unless noted otherwise, specifications apply over the operating temperature range with VDD = +3.3 V and VEE = –48 V relative to GND. VDD pins should be electrically shorted. AGND pins, DGND, GND12, and GND34 should be electrically shorted (“GND”). VEE, VEE1, VEE2, VEE3, and VEE4 should be electrically shorted (“VEE”). ...

Page 5

... RST low time to generate system reset Measured V relative to actual EE V for V (–44 to – Point at which VEE UVLO is declared. VEE going negative VEE going positive Rev. 1.2 Si3452 Min Typ Max Unit –40 — 85 °C — 32 — °C/W — 28 — ...

Page 6

... Si3452 Table 4. Detection Specifications Description Detection Current Limit Detection Voltage, when kΩ DET Detection Slew Rate Detection Probe Duration Detection Probe Cycle Time Minimum Valid Signature Resistance Maximum Valid Signature Resistance Resistance at which Open Circuit is Declared Resistance at which Short Circuit is Declared ...

Page 7

... CUT is user-programmable in 3.2 mA increments to over CUT will dynamically decrease to prevent excessive FET OVLD Test Conditions dV/dt disconnect Time from I load current to port OFF turn off Rev. 1.2 Si3452 Min Typ Max Unit Ω — 0.3 0.6 400 425 450 mA 1 – ...

Page 8

... Si3452 Table 8. Port Measurement and Monitoring Specifications Description Symbol Port Current Measurement I OFFSET Offset Port Current Measurement % Tolerance 2 Table 9. SMBus (I C) Electrical Specifications VDD = 3.0 to 3.6 V Description Symbol V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL I Input Leakage Current L *Note: 0 ...

Page 9

... INT Read to INT Pin High Notes: 1. Not production tested (guaranteed by design). 2. All timing references measured The Si3452 will stretch (pull down on) SCK during the ACK time period if required. The maximum SCL stretching is 10 µsec; so, SCL only needs to be bidirectional for SCL ...

Page 10

... Si3452 Table 12. Interrupt (INT) Specifications Description Symbol Output Low Voltage V OL Table 13. Input Voltage Reference Specifications Description Symbol Nominal VREF Input Reference Tolerance VREF Loading 10 Test Conditions Min INT pin driving ≤ 8.5 mA — Test Conditions Min — — Input current – ...

Page 11

... AGND DGND GND12/34 SCL DET4 SDA INT DET3 Si3452 RST DET2 VREF DET1 RBIAS VEE VEE[4:1] VOUT4 VOUT3 VOUT2 VOUT1 –54 V Rev. 1.2 Si3452 PSE State Machines and Measurement Subsystem Mixed Signal Resources Si3452 PORT1 PORT2 PORT3 PORT4 2 C Host Interface 11 ...

Page 12

... Functional Description Integrating four independent, high-voltage PSE port interfaces, the Si3452 high-voltage port controller enables an extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452 provides all of the high- voltage Power over Ethernet PSE functions. Each port of the Si3452 integrates all high-voltage PSE controller functions needed for a quad-port PoE design, including the power MOSFET, efficient current-sensing circuitry, transient voltage surge suppressor, and multiple detect and disconnect circuits ...

Page 13

... IEEE 802.3af and 802.3at standards. The current limit during this test mode nominal. The Si3452 supports 1-Event and 2-Event classification. When operating in PoE (<15.4 W) mode, 1-Event classification is used. Operation in PoE+ (>15.4 W) mode results in 2-Event classification probes. The 1-Event classification is compliant to IEEE standard 802 ...

Page 14

... Disconnect and the IEEE 802.3 PoE Standard". 4.5. Transient Voltage Surge Suppression The Si3452 features robust on-chip surge protectors on each port; this is an industry first. This unique protection circuitry acts as an active device that can withstand lightning-induced transients as well as large ESD transient events ...

Page 15

... Fixed IC Pin Set IC Addr ess Addr ess Figure 6. Typical I The Si3452 does not support the alert response address (ARA) protocol. Polling is used to determine which controller is interrupting in an interrupt-driven system compliant with the System Management Bus 2 C serial bus. Reads and writes to the interface by the 2 C interface autonomously controlling the serial transfer of the data ...

Page 16

... Pins with the same name must be externally connected and then tied high or low via a weak (10 k) pull up or pull down to establish the device address at power up. The Si3452 powers up in either Auto mode or Shutdown mode depending on the ordering part number. For more information, see "12. Ordering Guide" on page 33. ...

Page 17

... OR (tI Event AND tI CUT CUT or port voltage not within CUT turns off ports but does not generate a disconnect event. Rev. 1.2 Si3452 mask) OR (Rgood_CLS_event AND or temperature status in register EE . The port is turned off on this ...

Page 18

... L2 power management where the PSE advertises it is capable of PoE powering by generating two classification pulses. 2-Event classification is only supported for auto mode. If the Si3452 is in auto mode and the first event classification result is Class 4, the mark, second event, and second mark are performed. Power is applied only if the second event is also Class 4 ...

Page 19

... Device Status Register (0x1D) The device event bits are listed in Table 18. Bit The Si3452 has per-port thermal shutdown sensors as well a global thermal shutdown B6—OverTemp at a slightly higher temperature. The global thermal shutdown bit of the device event register is set if this occurs. ...

Page 20

... Si3452 20 Rev. 1.2 ...

Page 21

... Rev. 1.2 Si3452 21 ...

Page 22

... Si3452 22 Rev. 1.2 ...

Page 23

... Table 21. Si3452 Class Encoding Value Condition 000b Unknown 001b Class 1 010b Class 2 011b Class 3 100b Class 4 101b Probes Not Equal 110b Class 0 111b Class Overload Table 22. Si3452 Port Mode Encoding Value Condition 00b Shutdown 01b Manual 10b Semiauto 11b Auto Rev. 1.2 Si3452 23 ...

Page 24

... Auto Mode Setting of I Register CUT 0x1E 0x35 0x75 0x75 0xC9 time of 60 ms), the current limit is set to 425 mA, even in PoE+ mode. Table 24. Si3452 Command Codes [B1..B0] Command [B5..B2] Parameter 0001b 2 bit port number 0010b 2 bit port number 0011b 2 bit port number ...

Page 25

... Operational Notes 6.1. Port Turn On If the port is turned on by putting it in auto mode, the Si3452 will take care of all specified timing, and it will take care of the two-event classification if the first event result is Class 4 and PoE+ mode is enabled. However, if automatic mode operation is not desired after port turn-on, the port should be set to semi-auto or manual mode once it has powered ...

Page 26

... The thermal pad of the Si3452 is connected to VEE. At full IEEE 802.3at current of 600 mA on each port, the dissipation of the Si3452 1.2 W; so, multiple vias are required to conduct the heat from the thermal pad to the VEE plane. As many as 36 small vias provide the best thermal conduction. ...

Page 27

... Workaround: None 2 8. Address ACK Issue: Very rarely, the Si3452 may not ACK the I 2 Impact: This is allowed in the I C specification. Workaround: Retransmit the address byte if there is an ACK failure. ...

Page 28

... View Table 25. Si3452 Pin Descriptions Description Driver 1 VEE supply. Short to VEE, VEE2/3/4. Global PoE (–48 V nom.) or PoE+ (–54 V nom.) supply. Short to VEE1/2/3/4. 1.1 V nom. voltage reference from reference generator (for example, TLV431 or power management unit). Measurement data converter input. Short to AOUT. ...

Page 29

... Table 25. Si3452 Pin Descriptions (Continued) Pin # Name Type 13 DET4 Analog I/O 14 SDA Digital I/O 15 GND34 Ground 16 SCL Digital I connect 18 DET3 Analog I/O 19 VDD Supply 20 VOUT3 Analog I/O 21 AD3 Digital I/O 22 VEE3 Supply 23 RST Digital input 24 AD3 Digital I/O 25 AD2 Digital I/O ...

Page 30

... Si3452 Table 25. Si3452 Pin Descriptions (Continued) Pin # Name Type 37 DET1 Analog I/O 38 RST Digital input 39 VOUT1 Analog I/O 40 INT Digital output ePAD Vee Supply 30 Description Connection for port 1 detection and classification. See DET4 for detailed descrip- tion. Active low digital reset. Short to RST pin 23. ...

Page 31

... Package Outline: 40-Pin QFN The Si3452 is packaged in an industry-standard, RoHS compliant Figure 7. 40-Pin QFN Mechanical Diagram Table 26. Package Diagram Dimensions Dimension aaa bbb ccc ddd eee Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. ...

Page 32

... Si3452 11. Recommended PCB Footprint Table 27. PCB Land Pattern Dimensions Dimension Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0 ...

Page 33

... Detect Timing and Powerup Modes (PoE vs. PoE+, Shutdown vs. Auto) are pre-configured in firmware but can be reconfigured at any time via a host connection. 6. All devices are packaged in RoHS-compliant, 40-pin, 6x6 mm QFN. 7. The Si3452-B01-GM is PoE+ capable. The part defaults to PoE mode at powerup but can be reconfigured to PoE+ via register settings. 12.1. Evaluation Kits and Reference Designs ...

Page 34

... Si3452 13. Device Marking Diagram Line # Text Value Base part number. This is not the “Ordering Part Number” since it does not contain a 1 Si3452 specific revision. Refer to "12. Ordering Guide" on page 33 for complete ordering information Device revision. 2 XZZ ZZ = Firmware revision Industrial temperature range. ...

Page 35

... Updated Figure 9, “Device Marking Diagram,” on page 34.  Updated typical V reset threshold in Table page 5.  Clarified notes in Table 19, “Si3452 Register Map,” on page 20.  Updated Table 28, “Device Marking Table,” on page 34.  Clarified notes in "12. Ordering Guide" on page 33. Rev. 1.2 Si3452 ...

Page 36

... Si3452 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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