SI3453C-B01-GM Silicon Laboratories Inc, SI3453C-B01-GM Datasheet - Page 5

• Manufacturer Part Number: SI3453C-B01-GM
• Description: IC POE CONTROLLER MIDSPAN 40QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3453C-B01-GM

• Package / Case: 40-QFN
• Controller Type: Power over Ethernet Controller (POE)
• Interface: I²C
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 14mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Power Dissipation: 1.2 W
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3at, IEEE 802.3af
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 14 mA
• Maximum Operating Temperature: + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1840-5

Table 3. UVLO, and Reset Specifications
Table 2. Recommended Operating Conditions
V
V
RST input high voltage
RST input low voltage
RST input leakage
Reset time delay
Reset assertion time
V
V
*Note: If V
Operating temperature
Thermal impedance*
Power Supply Voltages
V
V
Power Supply Currents
V
V
*Note: Modeled with six parts, evenly spaced on a 30 x 120 mm
DD
DD
EE
EE
EE
DD
EE
DD
monitor accuracy
UVLO threshold
reset threshold
power-on ramp
supply voltage
supply current
supply voltage
supply current
Description
Description
reset operation.
the back.
DD
ramp time is slower than 1 msec, hold the reset pins low until V
*
T
Symbol
V
V
RSTDLY
V
T
EEMON
UVLO
RST
RST
Symbol
V
V
θ
I
I
T
DD
EE
DD
JA
EE
A
Time between end of reset and begin-
Point at which VEE UVLO is declared.
Measured V
RST low time to generate system
ning of normal operation
Ramp from 0 V to 1.8 V
All ports on, excluding load current.
for V
For IEEE 802.3af (15.4 W) apps.
VEE going negative
VEE going positive
For IEEE 802.3at (30 W) apps.
Test Conditions
All ports in shutdown mode
EE
EE
RST = 0 V
(–44 to –57 V)
relative to actual V
reset
Test Conditions
Rev. 0.42
1 m/s airflow
No airflow
2
, four-layer board with 25 thermal vias to a Vneg plane on
EE
0.7 x V
DD
–1.5
Min
15
—
—
—
—
—
—
—
is above 3.0 V to insure proper
Min
DD
–10
–57
–57
3.0
—
—
—
—
—
1.75
Typ
–36
–33
—
—
—
—
—
—
—
Typ
–48
–54
3.3
32
28
10
—
4
1
Si3452/3
TBD
Max
0.8
1.5
40
—
—
—
—
—
Max
1
–45
–51
3.6
85
—
—
—
—
5
°C/W
msec
Unit
Unit
mA
mA
°C
ms
μA
μs
V
V
V
V
V
V
V
5