LTC4267CDHC-3#TRPBF Linear Technology, LTC4267CDHC-3#TRPBF Datasheet - Page 4

• Manufacturer Part Number: LTC4267CDHC-3#TRPBF
• Description: IC POE 802.3AF INTERFACE 16-DFN
• Manufacturer: Linear Technology

Specifications of LTC4267CDHC-3#TRPBF

• Controller Type: Power over Ethernet Controller (POE)
• Interface: IEEE 802.3af
• Current - Supply: 3mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

LTC4267-3
SYMBOL
I
I
f
DC
DC
t
t
V
I
t
T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: P
PGND.
Note 3: The LTC4267-3 operates with a negative supply voltage in the
range of – 1.5V to – 57V. To avoid confusion, voltages for the PD interface
are always referred to in terms of absolute magnitude. Terms such as
“maximum negative voltage” refer to the largest negative voltage and
a “rising negative voltage” refers to a voltage that is becoming more
negative.
Note 4: The LTC4267-3 is designed to work with two polarity protection
diode drops between the PSE and PD. Parameter ranges specifi ed in the
Electrical Characteristics section are with respect to this product pins and
are designed to meet IEEE 802.3af specifi cations when these diode drops
are included. See the Application Information section.
Note 5: Signature resistance is measured via the two-point ∆V/∆I method
as defi ned by IEEE 802.3af. The PD signature resistance is offset from
the 25k to account for diode resistance. With two series diodes, the total
PD resistance will be between 23.75k and 26.25k and meet IEEE 802.3af
specifi cations. The minimum probe voltages measured at the LTC4267-3
pins are –1.5V and –2.5V. The maximum probe voltages are –8.5V and
–9.5V.
Note 6: The PD interface includes hysteresis in the UVLO voltages to
preclude any start-up oscillation. Per IEEE 802.3af requirements, the PD
will power up from a voltage source with 20Ω series resistance on the fi rst
trial.
Note 7: Dynamic Supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 8: I
programmed at the R
I
Note 9: I
accuracy is with respect to the ideal current defi ned as I
4
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
LIM_HI
LIM_LO
OSC
RISE
FALL
SLMAX
SFST
VPORTN_CLASS
SHUTDOWN
IMAX
ON(MIN)
ON(MAX)
VPORTN_CLASS
CLASS
VCC
internal clamp circuit self regulates to 9.4V with respect to
PARAMETER
Input Current Limit, High Level
Input Current Limit, Low Level
Oscillator Frequency
Minimum Switch On Duty Cycle
Maximum Switch On Duty Cycle
NGATE Drive Rise Time
NGATE Drive Fall Time
Peak Current Sense Voltage
Peak Slope Compensation Output
Current
Soft-Start Time
Thermal Shutdown Trip Temperature (Notes 14, 18)
+ I
is the measured current fl owing through R
CLASS
CLASS
does not include classifi cation current
(See note 9).
pin. Total current in classifi cation mode will be
CONDITIONS
V
V
V
V
– P
V
– P
C
C
R
P
P
PORTN
PORTN
ITH
ITH
ITH
LOAD
LOAD
VCC
VCC
SL
CLASS
GND
GND
/RUN – PGND = 1.3V, P
/RUN – PGND = 1.3V, V
/RUN – PGND = 1.3V, V
= 0, P
CLASS
– P
– P
= 3000pF , P
= 3000pF , P
A
= –48V, P
= –48V, P
= 8V
= 8V
= 1.237/
GND
GND
= 25°C. (Note 3)
. ∆I
VCC
CLASS
= 8V (Note 17)
= 8V
– P
The
OUT
OUT
GND
VCC
VCC
●
= –43V (Note 14, 15)
= –43V (Note 14, 15)
– P
– P
denotes the specifi cations which apply over the full operating
= 8V (Note 16)
GND
GND
R
resistance. The total classifi cation current for a PD also includes the IC
quiescent current (I
Note 10: To disable the 25k signature, tie SIGDISA to V
SIGDISA high with respect to V
section.
Note 11: For the DHC package, this parameter is assured by design and
wafer level testing.
Note 12: The switching regulator is tested in a feedback loop that servos
V
midpoint of the current limit range.
Note 13: I
good status circuit. This current is compensated for in the 25k signature
resistance and does not affect PD operation.
Note 14: The LTC4267-3 PD Interface includes thermal protection. In
the event of an overtemperature condition, the PD interface will turn off
the switching regulator until the part cools below the overtemperature
limit. The LTC4267-3 is also protected against thermal damage from
incorrect classifi cation probing by the PSE. If the LTC4267-3 exceeds the
overtemperature threshold, the classifi cation load current is disabled.
Note 15: The PD interface includes dual level input current limit. At turn-
on, before the P
to a low level. After the load capacitor is charged and the P
voltage difference is below the power good threshold, the PD switches to
high level current limit. The PD stays in high level current limit until the
input voltage drops below the UVLO turn-off threshold.
Note 16: Peak current sense voltage is reduced dependent on duty cycle
and an optional external resistor in series with the SENSE pin (R
details, refer to the programmable slope compensation feature in the
Applications Information section.
Note 17: Guaranteed by design.
Note 18: The LTC4267-3 features thermal overload protection. Thermal
overload protection is intended to protect the device during momentary
fault conditions and continuous operation in thermal overload should be
avoided as it may impair device reliability.
VCC
FB
FB
CLASS
FB
– PGND = 0.8V, P
– PGND = 0.8V, P
= 8V
= 8V
to the output of the error amplifi er while maintaining I
– P
. The current accuracy does not include variations in R
GND
POUT_LEAK
= 8V
OUT
VPORTN_CLASS
load capacitor is charged, the PD current level is set
VCC
VCC
includes current drawn through P
●
●
●
PORTN
). See the Applications Information section.
MIN
350
270
90
70
90
. See the Applications Information
TYP
300
100
140
1.4
80
40
40
8
5
OUT
PORTP
MAX
TH
by the power
450
205
330
115
9.6
OUT
90
/RUN at the
or hold
CLASS
– V
SL
PORTN
). For
UNITS
42673f
kHz
mA
mA
mV
ms
ns
ns
°C
%
%
A