ENC28J60-I/SO Microchip Technology, ENC28J60-I/SO Datasheet - Page 3

• Manufacturer Part Number: ENC28J60-I/SO
• Description: IC ETHERNET CTRLR W/SPI 28SOIC
• Manufacturer: Microchip Technology

Specifications of ENC28J60-I/SO

• Package / Case: 28-SOIC (7.5mm Width)
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: SPI
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.1 V to 3.6 V
• Supply Current (max): 180 mA
• Data Rate: 10Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3
• Interface Type: SPI
• Supply Current: 180mA
• Supply Voltage Range: 3.1V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Ethernet Connection Type: 10Base-T
• Digital Ic Case Style: SOIC
• No. Of Pins: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Ethernet Controller Features
• IEEE 802.3™ Compatible Ethernet Controller
• Fully Compatible with 10/100/1000Base-T Networks
• Integrated MAC and 10Base-T PHY
• Supports One 10Base-T Port with Automatic
• Supports Full and Half-Duplex modes
• Programmable Automatic Retransmit on Collision
• Programmable Padding and CRC Generation
• Programmable Automatic Rejection of Erroneous
• SPI Interface with Clock Speeds Up to 20 MHz
Buffer
• 8-Kbyte Transmit/Receive Packet Dual Port SRAM
• Configurable Transmit/Receive Buffer Size
• Hardware Managed Circular Receive FIFO
• Byte-Wide Random and Sequential Access with
• Internal DMA for Fast Data Movement
• Hardware Assisted Checksum Calculation for
Medium Access Controller (MAC)
Features
• Supports Unicast, Multicast and Broadcast
• Programmable Receive Packet Filtering and Wake-up
Physical Layer (PHY) Features
• Loopback mode
• Two Programmable LED Outputs for LINK, TX,
© 2008 Microchip Technology Inc.
Polarity Detection and Correction
Packets
Auto-Increment
Various Network Protocols
Packets
Host on Logical AND or OR of the Following:
- Unicast destination address
- Multicast address
- Broadcast address
- Magic Packet™
- Group destination addresses as defined by
- Programmable Pattern Matching of up to
RX, Collision and Full/Half-Duplex Status
64-bit Hash Table
64 bytes at user-defined offset
Stand-Alone Ethernet Controller with SPI Interface
Preliminary
Operational
• Six Interrupt Sources and One Interrupt Output Pin
• 25 MHz Clock Input Requirement
• Clock Out Pin with Programmable Prescaler
• Operating Voltage of 3.1V to 3.6V (3.3V typical)
• 5V Tolerant Inputs
• Temperature Range: -40°C to +85°C Industrial,
• 28-Pin SPDIP, SSOP, SOIC, QFN Packages
Package Types
RESET
* Reserved pin; always leave disconnected.
0°C to +70°C Commercial (SSOP only)
V
28-Pin SPDIP, SSOP, SOIC
28-pin QFN
SSRX
SCK
NC*
SO
CS
SI
CLKOUT
RESET
RBIAS
V
TPIN+
TPIN-
V
SSRX
ENC28J60
SCK
NC*
V
CAP
INT
SO
CS
SS
SI
1
2
3
4
5
6
7
28 27 26 25 24 23 22
8 9 10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ENC28J60
11 12 13 14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
20
19
18
17
16
15
21
DS39662C-page 1
V
LEDA
LEDB
V
OSC2
OSC1
V
V
V
V
V
TPOUT+
TPOUT-
V
DD
DDOSC
SSOSC
SSPLL
DDPLL
DDRX
SSTX
DDTX
V
OSC2
OSC1
V
V
V
V
DDOSC
SSOSC
SSPLL
DDPLL
DDRX