IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 259
IDT82V2108PX8
Manufacturer Part Number
IDT82V2108PX8
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82V2108PX8.pdf
(292 pages)
Specifications of IDT82V2108PX8
Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
82V2108PX8
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82V2108PX8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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IDT82V2108
T1 / J1 IBCG Loopback Code (047H, 0C7H, 147H, 1C7H, 247H, 2C7H, 347H, 3C7H)
T1/J1-046H). The IBC[7] is the MSB.
T1 / J1 PMON Interrupt Enable / Status (049H, 0C9H, 149H, 1C9H, 249H, 2C9H, 349H, 3C9H)
INTE:
XFER:
OVR:
Programming Information
Bit Name
Bit Name
Default
Bit No.
Default
Bit No.
Type
The IBC[7:X] define the content of the inband loopback code. ‘X’ is one of 3 to 0 which is depending on the length defined by the CL[1:0] (b1~0,
= 0: Disabled the interrupt on the INT pin when the counter data has been transferred into the Error Count registers.
= 1: Enabled the interrupt on the INT pin when the counter data has been transferred into the Error Count registers.
= 0: Indicate that the counter data has not been transferred to the Error Count registers.
= 1: Indicate that the counter data has been transferred to the Error Count registers.
This bit is clear to ‘0’ after the bit is read.
= 0: Indicate that no overwritten on the Error Count registers has occurred.
= 1: Indicate that one of the Error Count registers is overwritten.
This bit is clear to ‘0’ after the bit is read.
Type
IBC7
R/W
X
7
7
IBC6
R/W
6
X
6
Reserved
IBC5
R/W
X
5
5
IBC4
R/W
X
4
4
249
IBC3
R/W
X
3
3
INTE
IBC2
R/W
R/W
2
0
2
X
T1 / E1 / J1 OCTAL FRAMER
XFER
IBC1
R/W
R
1
0
X
1
March 5, 2009
OVR
IBC0
R/W
R
0
0
X
0
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