Z16C3010AEC Zilog, Z16C3010AEC Datasheet - Page 22

• Manufacturer Part Number: Z16C3010AEC
• Description: IC 10MHZ CMOS USC 100-VQFP
• Manufacturer: Zilog
• Series: USC®r

Specifications of Z16C3010AEC

• Controller Type: USC Controller
• Interface: DMA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 7mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 5. Z16C30 AC Characteristics (Continued)
DS007902-0708
No
123
Notes
1. Direct address is any of A/B, D/C, or AD15–AD8 used as an address bus.
2. The parameter applies only when AS is not present.
3. Strobe (STB) is any of DS, RD, WR, PITACK, RxACK or TxACK.
4. Parameter applies only if read empties the receive FIFO.
5. Parameter applies only if write fills the transmit FIFO.
6. For extended temperature part TdDSI(Wf) max = 220 ns.
7. For extended temperature part TdDSF(TRQ) max = 75 ns.
RESET
Note: STB is any of DS, RD, WR, PITACK, RxACK, or TxACK
STB
USC Timing
Symbol
TdTAKr(RDY)
The USC interface timing is similar to that found on a static RAM, except that it is much
more flexible. Up to eight separate timing strobe signals may be present on the interface:
DS, RD, WR, PITACK, RxACKA, RxACKB, TxACKA, and TxACKB. Only one of
these timing strobes may be active at any time. Should the external logic activate more
than one of these strobes at the same time the USC will enter a pre-reset state that is only
exited by a hardware reset. Do not allow overlap of timing strobes. The timing diagrams
beginning on the next page illustrate the different bus transactions possible with the neces-
sary setup hold and delay times.
Parameter
TxACK Rise to RDY Rise
Delay
P R E L I M I N A R Y
113
Figure 6. Reset Timing
Min
Max
40
114
115
Product Specification
Electrical Characteristics
Units
ns
Note
Z16C30
18