S-8233ACFE-TB Seiko Instruments, S-8233ACFE-TB Datasheet - Page 13

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S-8233ACFE-TB

Manufacturer Part Number
S-8233ACFE-TB
Description
Battery Management 4.25V 3-Cell Serial
Manufacturer
Seiko Instruments
Datasheets

Specifications of S-8233ACFE-TB

Product
Charge Management
Battery Type
Li-Ion Pack
Output Voltage
24 V
Operating Supply Voltage
2 V to 24 V
Supply Current
50 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Package / Case
SOP-14
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S-8233ACFE-TB
Manufacturer:
SEIKO
Quantity:
51 000
Rev.4.1
Description
Remark Refer to “
Normal condition
Over current condition
Over charge condition
The release mechanism is as follows: the discharge current flows through an internal parasitic diode of
This IC monitors the voltages of the three serially-connected batteries and the discharge current to control
charging and discharging. If the voltages of all the three batteries are in the range from the over
discharge detection voltage (V
through the batteries becomes equal or lower than a specified value (the VMP terminal voltage is equal or
lower than over current detection voltage 1), the charging and discharging FETs turn on. In this condition,
charging and discharging can be carried out freely. This condition is called the normal condition. In this
condition, output voltage of CSO,ISO and DSO go ‘low’. VCC terminals are shorted by the R
This IC is provided with the three over current detection levels (V
current detection delay time (t
If the discharging current becomes equal to or higher than a specified value (the VMP terminal voltage is
equal to or higher than the over current detection voltage) during discharging under normal condition and
it continues for the over current detection delay time (t
discharging. This condition is called an over current condition. The VMP and VCC terminals are shorted
by the R
When the discharging FET is off and a load is connected, the VMP terminal voltage equals the V
potential. In this condition, output voltage of ISO goes ‘High’.
The over current condition returns to the normal condition when the load is released and the impedance
between the EB- and EB+ terminals (see Figure 9 for a connection example) is 100 MΩ or higher. When
the load is released, the VMP terminal, which and the VCC terminal are shorted with the R
goes back to the V
detection voltage 1 (V
terminal is fixed at the 'L' level and over current detection 1 is inhibited) and returns to the normal
condition. At that time, output voltage of ISO goes ‘Low’.
If one of the battery voltages becomes higher than the over charge detection voltage (V
charging under normal condition and it continues for the over charge detection delay time (t
the charging FET turns off to stop charging. This condition is called the over charge condition. The 'H'
level signal is output to the conditioning terminal corresponding to the battery which exceeds the over
charge detection voltage until the battery becomes equal to lower than the over charge release voltage
(V
R
The over charge condition is released in two cases. The output of CSO terminal changes to ‘L’ when the
over charge condition is released.
1) The battery voltage which exceeded the over charge detection voltage (V
2) If the battery voltage which exceeded the over charge detection voltage (V
the charging FET immediately after a load is installed and discharging starts, and the VMP terminal
voltage decreases by about 0.6 V from the VCC terminal voltage momentarily. The IC detects this
voltage (over current detection voltage 1 or higher), releases the over charge condition and returns to the
normal condition.
VCM
CD
_00
the over charge release voltage (V
starts, the charging FET turns on and the normal condition returns.
charge release voltage (V
). In this condition, output voltage of CSO is ‘High’. The VMP and VCC terminals are shorted by the
resistor under the over charge condition.
VCM
resistor at this time. The charging FET turns off.
Battery Protection IC Connection Example”.
CC
potential. The IC detects that the VMP terminal potential returns to over current
IOV1
) or lower (or the over current detection voltage 2 (V
IOV1
CD
DD
), the charging FET turns on and the normal condition returns.
) to the over charge detection voltage (V
,t
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
IOV2
and t
Seiko Instruments Inc.
CD
), but the charger is removed, a load is placed, and discharging
IOV3
) corresponding to each over current detection level.
IOV
) or longer, the discharging FET turns off to stop
IOV1
,V
IOV2
CU
and V
), and the current flowing
IOV2
CU
CU
) falls below the over
IOV3
) or lower if the COVT
) is equal or higher than
) and the three over
S-8233C Series
CU
) during
VCM
CU
VCM
) or longer,
resistor,
SS
resistor.
13

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