AAT2552IRN-CAE-T1 Analogic Tech, AAT2552IRN-CAE-T1 Datasheet - Page 21

• Manufacturer Part Number: AAT2552IRN-CAE-T1
• Description: Charge Pumps Total Pwr Solution for Portable App
• Manufacturer: Analogic Tech

Specifications of AAT2552IRN-CAE-T1

• Package / Case: TDFN-16 EP
• Mounting Style: SMD/SMT
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The maximum input capacitor RMS current is:
The input capacitor RMS ripple current varies with the
input and output voltage and will always be less than or
equal to half of the total DC load current.
for V
The term appears in both the input voltage ripple and
input capacitor RMS current equations and is a maxi-
mum when V
ripple and the input capacitor RMS current ripple are a
maximum at 50% duty cycle.
The input capacitor provides a low impedance loop for the
edges of pulsed current drawn by the step-down con-
verter. Low ESR/ESL X7R and X5R ceramic capacitors are
ideal for this function. To minimize stray inductance, the
capacitor should be placed as closely as possible to the IC.
This keeps the high frequency content of the input current
localized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C6) can be
seen in the evaluation board layout in Figure 7.
A laboratory test set-up typically consists of two long
wires running from the bench power supply to the evalu-
ation board input voltage pins. The inductance of these
wires, along with the low-ESR ceramic input capacitor,
can create a high Q network that may affect converter
performance. This problem often becomes apparent in
the form of excessive ringing in the output voltage dur-
ing load transients. Errors in the loop phase and gain
measurements can also result.
Since the inductance of a short PCB trace feeding the
input voltage is significantly lower than the power leads
from the bench power supply, most applications do not
exhibit this problem.
In applications where the input power source lead induc-
tance cannot be reduced to a level that does not affect
SystemPower
2552.2009.01.1.3
IN
= 2 · V
V
V
IN
O
O
· 1 -
O
I
is twice V
⎛
⎝
RMS
TM
= I
V
V
IN
O
O
I
⎞
⎠
·
RMS(MAX)
=
IN
. This is why the input voltage
V
V
D · (1 - D) =
IN
O
=
· 1 -
I
2
⎛
⎝
O
V
V
IN
O
⎞
⎠
0.5
2
w w w . a n a l o g i c t e c h . c o m
=
1
2
Total Power Solution for Portable Applications
the converter performance, a high ESR tantalum or alu-
minum electrolytic capacitor should be placed in parallel
with the low ESR, ESL bypass ceramic capacitor. This
dampens the high Q network and stabilizes the system.
The linear regulator and the step-down convertor share
the same input capacitor on the evaluation board.
Linear Regulator Output Capacitor (C5)
For proper load voltage regulation and operational stabil-
ity, a capacitor is required between OUT and GND. The
C
pin should be made as directly as practically possible for
maximum device performance. Since the regulator has
been designed to function with very low ESR capacitors,
ceramic capacitors in the 1.0μF to 10μF range are rec-
ommended for best performance. Applications utilizing
the exceptionally low output noise and optimum power
supply ripple rejection should use 2.2μF or greater for
C
load is less than 10mA, the minimum value for C
be as low as 0.47μF.
Battery Charger Output Capacitor (C2)
The battery charger of the AAT2552 only requires a 1μF
ceramic capacitor on the BAT pin to maintain circuit stabil-
ity. This value should be increased to 10μF or more if the
battery connection is made any distance from the charger
output. If the AAT2552 is to be used in applications where
the battery can be removed from the charger, such as
with desktop charging cradles, an output capacitor great-
er than 10μF may be required to prevent the device from
cycling on and off when no battery is present.
Step-Down Converter Output Capacitor (C3)
The output capacitor limits the output ripple and pro-
vides holdup during large load transitions. A 4.7μF to
10μF X5R or X7R ceramic capacitor typically provides
sufficient bulk capacitance to stabilize the output during
large load transitions and has the ESR and ESL charac-
teristics necessary for low output ripple. For enhanced
transient response and low temperature operation appli-
cations, a 10μF (X5R, X7R) ceramic capacitor is recom-
mended to stabilize extreme pulsed load conditions.
The output voltage droop due to a load transient is dom-
inated by the capacitance of the ceramic output capacitor.
During a step increase in load current, the ceramic output
capacitor alone supplies the load current until the loop
responds. Within two or three switching cycles, the loop
responds and the inductor current increases to match the
load current demand. The relationship of the output volt-
OUT
OUT
. In low output current applications, where output
capacitor connection to the LDO regulator ground
PRODUCT DATASHEET
AAT2552178
OUT
can
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