78M6612-MR/F/P2 Maxim Integrated Products, 78M6612-MR/F/P2 Datasheet - Page 74
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78M6612-MR/F/P2
Manufacturer Part Number
78M6612-MR/F/P2
Description
Current & Power Monitors & Regulators
Manufacturer
Maxim Integrated Products
Datasheet
1.78M6612-IMF.pdf
(111 pages)
Specifications of 78M6612-MR/F/P2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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78M6612 Data Sheet
4 Firmware Interface
4.1 I/O RAM Map
‘Not Used’ bits are grayed out, contain no memory and are read by the MPU as zero. Reserved bits may
be in use and should not be changed. This table lists only the SFR registers that are not generic 8051
SFR registers.
74
VERSION 2006
CONFIG0 2004 VREF_CAL
CONFIG1 2005 Reserved
CONFIG2 2007
Configuration:
Digital I/O:
Real Time Clock:
LCD Display Interface:
COMP0 2003 Not Used
WAKE
TMUX
LCDX
LCDY
LCDZ
Name
RTC0
RTC1
RTC2
RTC3
RTC4
RTC5
RTC6
RTC7
LCD0
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIO6
CE0
CE1
CE2
CE3
WE
201A
201B
201C Not Used
20AA Not Used
2015
2016
2017
2018
2019
201F
2020 Not Used
2021 Not Used
2022 Not Used
2030
20A8 Not Used
20A9 WAKE_ARM
200A Not Used
200B Not Used
200C Not Used
200D Not Used
200E Not Used
Addr
2000
2001
2002
2008
2009
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Bit 7
PRE_SAMPS[1:0]
MUX_DIV[1:0]
DIO_EEX[1:0]
TX1E[1:0]
Table 48: I/O RAM Map – In Numerical Order
Not Used
Reserved
EQU[2:0]
PLS_INV
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
PLL_OK
LCD_Y
SLEEP
Bit 6
BME
Not Used
DIO_R3[2:0]*
DIO_R11[2:0]
DIO_R1[2:0]
DIO_R5[2:0]
DIO_R7[2:0]
DIO_R9[2:0]
LCD_ONLY Not Used
Reserved
Not Used
Not Used
ECK_DIS
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
LCD_E
EX_PLL
RX1DIS
Bit 5
CKOUT_E[1:0]
CHOP_E[1:0]
EX_FWCOL
Not Used
Not Used
Not Used
FIR_LEN
RX1INV
CE_E
Bit 4
Write enable for RTC
VERSION[7:0]
Reserved
LCD_MODE[2:0]
WAKE_RES
VREF_DIS
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
DIO_PW
RTM_E
ADC_E
Bit 3
SUM_CYCLES[5:0]
Reserved
LCD_NUM[4:0]
CE_LCTN[4:0]
MUX_ALT
TMUX[4:0]
Reserved
Not Used
Reserved
WD_OVF
DIO_PV
Bit 2
LCD_SEG0[3:0]
Reserved
RTC_SEC[5:0]
RTC_MIN[5:0]
RTC_HR[4:0]
RTC_DAY[2:0]
RTC_DATE[4:0]
RTC_MO[3:0]
WAKE_PRD[2:0]
RTC_YR[7:0]
Reserved (000)
MPU_DIV[2:0]
DIO_R10[2:0]
DIO_R2[2:0]
DIO_R4[2:0]
DIO_R6[2:0]
DIO_R8[2:0]
RTC_DEC_SEC
Reserved COMP_STAT[0]
FLSH66Z
EX_RTC
TX1MOD
Bit 1
DS_6612_001
LCD_CLK[1:0]
OPT_FDC[1:0]
Rev. 1.2
RTC_INC_SEC
Reserved
EX_XFR
TX1INV
Bit 0
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