CY7C68300B-56PVXC Cypress Semiconductor Corp, CY7C68300B-56PVXC Datasheet - Page 7
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CY7C68300B-56PVXC
Manufacturer Part Number
CY7C68300B-56PVXC
Description
IC USB 2.0 BRIDGE BULK 56SSOP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Specifications of CY7C68300B-56PVXC
Operating Temperature
0°C ~ 70°C
Controller Type
USB 2.0 Controller
Interface
I²C
Voltage - Supply
3.15 V ~ 3.45 V
Current - Supply
50mA
Mounting Type
Surface Mount
Package / Case
56-SSOP
Data Rate
480Mbps
Supply Voltage Range
3.15V To 3.45V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
SSOP
No. Of Pins
56
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C68300B-56PVXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
5.2
The following table lists the pinouts for the 56-pin SSOP, 56-
pin QFN and 100-pin TQFP package options for the AT2LP.
Please refer to the Pin Diagrams in section for differences
Table 5-1. AT2LP Pin Descriptions
Document 38-08033 Rev. *C
Notes:
SSOP
1.
2.
3.
N/A
N/A
N/A
N/A
56
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See section 5.3.9.
A ‘#’ sign after the pin name indicates that it is active LOW.
The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320/CY7C68321.
Pin Descriptions
QFN
54
13
N/A
N/A
N/A
N/A
56
50
51
52
53
55
56
10
12
14
11
1
2
3
4
5
6
7
8
9
Note: (Italics pin names denote pin functionality during CY7C68300A-compatibility mode)
[3]
[3]
TQFP
100
26
100
96
97
98
99
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
1
2
3
4
5
6
7
8
9
[3]
[3]
GND (RESERVED)
PWR500#
Pin Name
ATAPUEN
XTALOUT
(PU 10K)
DMINUS
DMARQ
SYSIRQ
XTALIN
DPLUS
IORDY
AGND
DD13
DD14
DD15
AV
GND
GND
GND
GND
GND
GND
(NC)
V
V
V
NC
CC
CC
CC
CC
[2]
PWR
PWR
PWR
PWR
Type
I/O
I/O
I/O
GND
GND
GND
GND
GND
GND
Xtal
Xtal
Pin
I/O
I/O
I/O
I/O
I
I
[1]
[1]
I
[1]
[1]
[1]
Default State
at Start-up
Input
Input
Input
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Xtal
Xtal
between the 68300B/01B and 68320/321 pinouts for the 56-
pin packages. For information on the CY7C68300A pinout,
please refer to the CY7C68300A data sheet that is found in the
“EZ-USB AT2” folder of the CY4615B reference design kit CD.
ATA Data bit 13.
ATA Data bit 14.
ATA Data bit 15.
Ground.
ATA pull-up voltage source for bus-powered applica-
tions (see section 5.3.10).
Alternate Function: Input when the EEPROM config-
uration byte 8 has bit 7 set to one. The input value is
reported through EP1IN (byte 0, bit 2).
V
Ground.
ATA Control.
ATA Control.
Ground.
Analog V
possible.
24-MHz Crystal Output (see section ).
24-MHz Crystal Input (see section ).
Analog Ground. Connect to ground with as short a
path as possible.
No Connect.
V
USB D+ Signal (see section 5.3.1).
USB D– Signal (see section 5.3.1).
Ground.
V
Ground.
Active HIGH. USB interrupt request (see section
5.3.4). Tie to GND if functionality is not used.
Ground.
Active LOW. VBUS power granted indicator used in
bus-powered designs (see section 5.3.11).
Alternate Function for 68320.
Reserved. Tie to GND.
CC
CC
CC
. Connect to 3.3V power source.
. Connect to 3.3V power source.
. Connect to 3.3V power source.
CC
CY7C68300B/CY7C68301B
. Connect to V
CY7C68320/CY7C68321
Pin Description
CC
through the shortest path
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