DP8390DN National Semiconductor, DP8390DN Datasheet - Page 27
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DP8390DN
Manufacturer Part Number
DP8390DN
Description
IC NIC (NETWORK INT CTRL)48-DIP
Manufacturer
National Semiconductor
Datasheet
1.DP8390DN.pdf
(56 pages)
Specifications of DP8390DN
Controller Type
Network Interface Controller (NIC)
Voltage - Supply
5V
Current - Supply
40mA
Mounting Type
Through Hole
Package / Case
48-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Operating Temperature
-
Interface
-
Other names
*DP8390DN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP8390DN
Manufacturer:
TI
Quantity:
11 688
Part Number:
DP8390DN
Manufacturer:
NS/国半
Quantity:
20 000
10 0 Internal Registers
10 4 DMA REGISTERS
The DMA Registers are partitioned into three groups Trans-
mit Receive and Remote DMA Registers The Transmit reg-
isters are used to initialize the Local DMA Channel for trans-
mission of packets while the Receive Registers are used to
initialize the Local DMA Channel for packet Reception The
Page Stop Page Start Current and Boundary Registers are
used by the Buffer Management Logic to supervise the Re-
ceive Buffer Ring The Remote DMA Registers are used to
initialize the Remote DMA
Note In the figure above registers are shown as 8 or 16 bits wide Although
10 5 TRANSMIT DMA REGISTERS
TRANSMIT PAGE START REGISTER (TPSR)
This register points to the assembled packet to be transmit-
ted Only the eight higher order addresses are specified
since all transmit packets are assembled on 256-byte page
boundaries The bit assignment is shown below The values
placed in bits D7–D0 will be used to initialize the higher
order address (A8–A15) of the Local DMA for transmission
The lower order bits (A7–A0) are initialized to zero
TRANSMIT BYTE COUNT REGISTER 0 1 (TBCR0 TBCR1)
These two registers indicate the length of the packet to be
transmitted in bytes The count must include the number of
TPSR A15
Bit Assignment
(A7 –A0 Initialized to zero)
some registers are 16-bit internal registers all registers are accessed
as 8-bit registers Thus the 16-bit Transmit Byte Count Register is
broken into two 8-bit registers TBCR0 and TBCR1 Also TPSR
PSTART PSTOP CURR and BNRY only check or control the upper 8
bits of address information on the bus Thus they are shifted to posi-
tions 15-8 in the diagram above
7
A14
6
A13
5
A12
4
A11
3
(Continued)
A10
2
A9
1
A8
DMA Registers
0
27
bytes in the source destination length and data fields The
maximum number of transmit bytes allowed is 64k bytes
The NIC will not truncate transmissions longer than 1500
bytes The bit assignment is shown below
10 6 LOCAL DMA RECEIVE REGISTERS
PAGE START STOP REGISTERS (PSTART PSTOP)
The Page Start and Page Stop Registers program the start-
ing and stopping address of the Receive Buffer Ring Since
the NIC uses fixed 256-byte buffers aligned on page bound-
aries only the upper eight bits of the start and stop address
are specified
PSTART PSTOP bit assignment
BOUNDARY (BNRY) REGISTER
This register is used to prevent overflow of the Receive
Buffer Ring Buffer management compares the contents of
this register to the next buffer address when linking buffers
together If the contents of this register match the next buff-
er address the Local DMA operation is aborted
PSTART
PSTOP
TBCR1 L15
TBCR0 L7
BNRY A15
7
7
7
A15 A14 A13 A12 A11 A10
7
A14
L14
L6
6
6
6
6
A13
L13
5
L5
5
5
5
A12
L12
L4
4
4
4
4
TL F 8582 – 61
A11
L11
L3
3
3
3
3
A10
L10
L2
2
2
2
2
A9
L9
L1
A9
1
1
1
1
A8
L8
L0
A8
0
0
0
0