MAX5909EEE Maxim Integrated Products, MAX5909EEE Datasheet - Page 9

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MAX5909EEE

Manufacturer Part Number
MAX5909EEE
Description
Hot Swap & Power Distribution
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5909EEE

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The MAX5904–MAX5909 are circuit breaker ICs for hot-
swap applications where a line card is inserted into a
live backplane. These devices hot swap supplies rang-
ing from +1V to +13.3V, provided one supply is at or
above 2.7V. Normally, when a line card is plugged into
a live backplane, the card’s discharged filter capacitors
provide low impedance that can momentarily cause the
main power supply to collapse. The MAX5904–
MAX5909 reside either on the backplane or on the
removable card to provide inrush current limiting and
short-circuit protection. This is achieved by using exter-
nal n-channel MOSFETs, external current-sense resis-
tors, and two on-chip comparators. Figure 1 shows the
MAX5906–MAX5909 functional diagram.
The MAX5904/MAX5905 have a fixed startup period
and current-limit threshold. The startup period and cur-
rent-limit threshold of the MAX5906–MAX5909 can be
adjusted with external resistors.
R
MAX5906–MAX5909 from 0.4ms to 50ms (see the
Setting the Startup Period, R
of the startup period is fixed at 9ms for the MAX5904/
MAX5905. The startup period begins after the following
three conditions are met:
1) V
2) V
_______________________________________________________________________________________________________
TIM
Low-Voltage, Dual Hot-Swap Controllers/Power
MAX5904/
MAX5905
the UVLO to startup delay (37.5ms).
V
steep rising edge at IN_ by inserting a minimum RC
time delay of 20µs.
IN1
ON
ON
sets the duration of the startup period for the
5
6
7
8
exceeds the channel 1 ON threshold (0.825V).
or V
should be delayed from the application of a
IN2
PIN
exceeds the UVLO threshold (2.4V) for
MAX5906–
MAX5909
10
11
12
13
14
15
16
Detailed Description
TIM
SENSE2
GATE2
NAME
OUTC
INC+
LIM2
ON
IN2
section). The duration
Startup Period
Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set
current-trip level. Connect to GND for the default 25mV threshold.
On Comparator Input
Channel 2 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
Channel 2 Current-Sense Input. Connect R
Channel 2 Supply Input. Connect to a supply voltage from 1V to 13.2V. Connect a
0.1µF ceramic bypass capacitor from IN2 to GND to filter high-frequency noise.
Uncommitted Comparator Noninverting Input
Uncommitted Comparator Open-Drain Output. Actively held low when V
than 1.236V.
3) The device is not latched or in its autoretry delay. (See
The MAX5904–MAX5909 limit the load current if an
overcurrent fault occurs during startup. The slow com-
parator is disabled during the startup period and the
load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
2) Limiting the voltage across the external current-
During the startup period, the gate drive current is typi-
cally 100µA and decreases with the increase of the
gate voltage (see the Typical Operating Character-
istics). This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcur-
rent, the MAX5904–MAX5909 regulate the gate voltage
to ensure that the voltage across the sense resistor
does not exceed V
inrush current during startup. Figure 2 shows the start-
up waveforms. PGOOD goes high impedance 0.75ms
after the startup period if no fault condition is present.
VariableSpeed/BiLevel fault protection incorporates two
comparators with different thresholds and response
times to monitor the load current (Figure 9). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
both MOSFET gates with a strong 3mA pulldown cur-
rent in response to a fault condition. After a fault,
PGOOD is pulled low, the MAX5905/MAX5907/
MAX5909 stay latched off and the MAX5904/MAX5906/
MAX5908 automatically restart.
Latched and Autoretry Fault Management section.)
MOSFET gate charging current
sense resistor.
VariableSpeed/BiLevel Fault Protection
Pin Description (continued)
FUNCTION
SENSE2
SU,TH
from IN2 to SENSE2.
. This effectively regulates the
Sequencers
INC+
is less
9

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