ML2003IQ Fairchild Semiconductor, ML2003IQ Datasheet - Page 2

• Manufacturer Part Number: ML2003IQ
• Description: Linear Regulators - Standard Gain/attenuator Logarithmic
• Manufacturer: Fairchild Semiconductor

Specifications of ML2003IQ

• Input Voltage Max: 3 V
• Pin Count: 20
• Screening Level: Industrial
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ML2003, ML2004
Pin Description
Absolute Maximum Ratings
2
Name
C3
(LATI) C2
(SID) C1
(LATO) C0
P
F3
(SCK) F2
F1
GND
SER/PAR
(SOD) F0
V
AGND
V
V
V
ATTEN/GAIN
Parameter
Supply Voltage
AGND with respect to GND
Analog Input and Output
Digital Input and Outputs
Input Current Per Pin
Power Dissipation
Storage Temperature Range
Lead Temeperature (Soldering, 10 sec)
DN
IN
SS
OUT
CC
V
V
CC
SS
In serial mode, pin is unused. In parallel mode, coarse gain select bit. Pin has internal pulldown
resistor to GND.
In serial mode, input latch clock which loads the data from the shift register into the latch.
In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
In serial mode, serial data input that contains serial 9 bit data word which controls the gain
setting. In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
In serial mode, output latch clock which loads the 9 bit data word back into the shift register from
the latch. In parallel mode, coarse gain select bit. Pin has internal pulldown resistor to GND.
Powerdown input . When P
normal operation. Pin has internal pulldown resistor to GND.
In serial mode, pin is unused. In parallel mode, fine gain select bit. Pin has internal pulldown
resistor to GND.
In serial mode, shift register clock which shifts the serial data on SID into the shift register on
rising edges and out on SOD on falling edges. In parallel mode, fine gain select bit. Pin has
internal pulldown resistor to GND.
In serial mode, pin is unused. In parallel mode, fine gain select bit. Pin has internal pulldown
resistor to GND.
Digital ground . 0 volts. All digital inputs and outputs are referenced to this ground.
Serial or parallel select input. When SER/PAR = 1, device is in serial mode.
When SER/PAR = 0, device is in parallel mode. Pin has internal pullup resistor to V
In serial mode, serial output data which is the output of the shift register. In parallel mode, fine
gain select bit. Pin has internal pulldown resistor to GND.
Analog input .
Analog ground . 0 volts. Analog input and output are referenced to this ground.
Negative supply . –5 volts ±10%.
Analog output .
Positive supply . +5 volts ±10%.
In serial mode, pin is unused. In parallel mode, attenuation/gain select bit. Pin has internal
pulldown resistor to GND.
1
DN
= 1, device is in powerdown mode. When P
Function
V
GND –0.3
SS
Min.
-65
–0.3V
V
V
CC
CC
Max.
+150
+6.5
±0.5
-6.5
±25
750
300
+0.3
+0.3
PRODUCT SPECIFICATION
DN
REV. 1.1.1 3/19/01
= 0, device is in
CC
Units
mW
mA
°C
°C
.
V
V
V
V
V