STSMIA832TBR STMicroelectronics, STSMIA832TBR Datasheet - Page 7

IC LINE RCVR 1.8V/2.8V 25-TFBGA

STSMIA832TBR

Manufacturer Part Number
STSMIA832TBR
Description
IC LINE RCVR 1.8V/2.8V 25-TFBGA
Manufacturer
STMicroelectronics
Type
Receiverr
Datasheet

Specifications of STSMIA832TBR

Number Of Drivers/receivers
0/1
Protocol
SMIA
Voltage - Supply
2.65 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
25-µTFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5147-2

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STSMIA832
Figure 5.
Figure 6.
Data-strobe signaling
Data is sent byte-wise LSB first. The state of the data and strobe signals at the beginning of
transmission are fixed i.e. the state of data is logic high and the state of strobe is logic low.
The number of clock cycles between synchronization codes has to be even, both between
SOL (or SOF) – EOL (or EOF) and EOL (or EOF) – SOL (or SOF). This ensures
synchronization is possible with minimum complexity to achieve the fastest possible
implementation. The strobe signal can be gated when using the data/strobe signaling, but
only if the number of clock cycles is even between synchronization codes.
If the number of transmission clock cycles between synchronization codes is even, it
ensures that for each synchronization code sequence FF0000h there will be corresponding
strobe sequence of 55AAAAh as illustrated in the figure 6 below.
Data-strobe phase relationship
Frame synchronization
Each image frame begins with frame start synchronization code (SOF) and ends with frame
end synchronization code (EOF). Each line inside the frame begins with line start
synchronization code (SOL) and ends with line end synchronization code (EOL). The period
between EOL code and new SOL code is called line blanking period. Similarly, the time
between EOF code and new SOF code is called frame blanking period. The total size of one
image frame shall be a multiple of 128 bits.
Doc ID 12174 Rev 5
Pin configuration
7/25

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