KSZ8001L Micrel Inc, KSZ8001L Datasheet - Page 6

• Manufacturer Part Number: KSZ8001L
• Description: IC TXRX PHY 10/100 3.3V 48-LQFP
• Manufacturer: Micrel Inc
• Type: Transceiverr

Specifications of KSZ8001L

• Protocol: MII, RMII, SMII
• Voltage - Supply: 1.8V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 52mA
• Supply Voltage Range: 1.71V To 1.89V, 3.135V To 3.465V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case: RoHS Compliant
• Interface Type: MII, RMII
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1620 - BOARD EVALUATION FOR KSZ8001L
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1508; 576-1508-5; 576-1508-5; KSZ8001L

May 2005 – SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE
KS8001
Pin Description
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin Name
MDIO
MDC
RXD3/
PHYAD1
RXD2/
PHYAD2
RXD1/
RXD[1]/
PHYAD3
RXD0/
RXD[0]/
RX
PHYAD4
VDDIO
GND
RXDV/
CRSDV/
PCS_LPBK
RXC/
SMII_SELECT
RXER/
RX_ER/
ISO
GND
VDDC
TXER
TXC/
REFCLK/
CLOCK
TXEN
TXD0/
TXD[0]/
TX
MICREL CONFIDENTIAL. DO NOT DISTRIBUTE.
Type
I/O
I
Ipd/O
Ipd/O
Ipd/O
Ipd/O
Pwr
Gnd
Ipd/O
Ipd/O
Ipd/O
Gnd
Pwr
Ipd
I/O
Ipd
Ipd
(Note 1)
Pin Function
Management Interface (MII) Data I/O
This pin requires an external 10K pull-up resistor.
Management Interface (MII) Clock Input
This pin is synchronous to the MDIO data interface
MII Mode: Receive Data Output[3]
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[1]
during reset. See “Strapping Options” section for details.
MII Mode: MII Receive Data Output[2]
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[2]
during reset. See “Strapping Options” section for details.
MII Mode: Receive Data Output[1]
RMII Mode: Receive Data Output[1]
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[3]
during reset. See “Strapping Options” section for details.
MII Mode: Receive Data Output[0]
RMII Mode: Receive Data Output[0]
SMII Mode: Receive Data and Control
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[4]
during reset. See “Strapping Options” section for details.
Digital IO 2.5 /3.3V tolerance power supply.
Ground
MII Mode: Receive Data Valid Output /
RMII Mode: Carrier Sense/Receive Data Valid /
Configuration Mode: The pull-up/pull-down value is latched as pcs_lpbk
during reset. See “Strapping Options” section for details.
MII Receive Clock Output
Operating at:
25 MHz = 100 Mbps
2.5 MHz = 10 Mbps
Configuration Mode: The pull-up/pull-down value is latched as SMII during
reset. See “Strapping Options” section for details.
MII Mode: Receive Error Output /
RMII Mode: Receive Error /
Configuration Mode: The pull-up/pull-down value is latched as ISOLATE
during reset. See “Strapping Options” section for details.
Ground
Digital core 1.8 V only power supply
MII Transmit Error Input
MII Mode: MII Transmit Clock Output /
RMII Mode: 50 MHz Reference Clock Input /
SMII Mode: 125 MHz Synchronization Clock Input
MII Transmit Enable Input
MII Mode: Transmit Data Input[0] /
RMII Mode: Transmit Data Input[0] /
SMII Mode: Transmit Data and Control
6
2
2
2
/
/
/
3
3
/
/
2
4
/
/
Micrel
KS8001