PIC12C508A-04I/P Microchip Technology Inc., PIC12C508A-04I/P Datasheet - Page 14
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PIC12C508A-04I/P
Manufacturer Part Number
PIC12C508A-04I/P
Description
8 PIN, 0.75 KB OTP, 25 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12C508A-04IP.pdf
(113 pages)
Specifications of PIC12C508A-04I/P
Cpu Speed
1 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
768 Bytes
Ram Size
25 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC12C5XX
4.2
Data memory is composed of registers, or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: special function registers and
general purpose registers.
The special function registers include the TMR0
register, the Program Counter (PC), the Status
Register, the I/O registers (ports), and the File Select
Register (FSR). In addition, special purpose registers
are used to control the I/O port configuration and
prescaler options.
The general purpose registers are used for data and
control information under command of the instructions.
For the PIC12C508, PIC12C508A and PIC12CE518,
the register file is composed of 7 special function
registers and 25 general purpose registers (Figure 4-
2).
For the PIC12C509, PIC12C509A, PIC12CR509A,
and PIC12CE519 the register file is composed of 7
special
registers, and 16 general purpose registers that may
be addressed using a banking scheme (Figure 4-3).
4.2.1
The general purpose register file is accessed either
directly or indirectly through the file select register FSR
(Section 4.8).
FIGURE 4-3:
DS40139E-page 14
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
function
PIC12C509, PIC12C509A, PIC12CR509A AND PIC12CE519 REGISTER FILE MAP
registers, 25
File Address
FSR<6:5>
general
Note 1:
07h
0Fh
00h
01h
02h
03h
04h
05h
06h
1Fh
10h
purpose
Not a physical register. See Section 4.8
General
Purpose
Registers
OSCCAL
General
Purpose
Registers
STATUS
INDF
Bank 0
TMR0
GPIO
PCL
FSR
00
(1)
3Fh
30h
2Fh
20h
Addresses map
back to
addresses
in Bank 0.
FIGURE 4-2:
General
Purpose
Registers
Bank 1
01
Note 1:
File Address
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
Not a physical register. See Section 4.8
PIC12C508, PIC12C508A AND
PIC12CE518 REGISTER FILE
MAP
Registers
1999 Microchip Technology Inc.
OSCCAL
Purpose
General
STATUS
INDF
TMR0
GPIO
PCL
FSR
(1)