DSPIC33FJ128GP306-I/PT Microchip Technology Inc., DSPIC33FJ128GP306-I/PT Datasheet - Page 188
DSPIC33FJ128GP306-I/PT
Manufacturer Part Number
DSPIC33FJ128GP306-I/PT
Description
DSP, 16-Bit, 128KB Flash, 16KB RAM, 53 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ128GP306-IPT.pdf
(370 pages)
Specifications of DSPIC33FJ128GP306-I/PT
A/d Inputs
18-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
I2C, SPI, UART/USART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
128K Bytes
Ram Size
16K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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dsPIC33F
REGISTER 15-4:
DS70165E-page 186
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
Note 1:
SEVTDIR
R/W-0
R/W-0
2:
(1)
SEVTDIR is compared with PTDIR (PTMR<15>) to generate the Special Event Trigger.
SEVTCMP<14:0> is compared with PTMR<14:0> to generate the Special Event Trigger.
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting downwards
0 = A Special Event Trigger will occur when the PWM time base is counting upwards
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
SEVTCMP: SPECIAL EVENT COMPARE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
Preliminary
SEVTCMP<14:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
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