PIC12F508-I/P Microchip Technology Inc., PIC12F508-I/P Datasheet
PIC12F508-I/P
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PIC12F508-I/P Summary of contents
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... Flash Microcontrollers *8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and foreign patents and applications may be issued or pending. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary Data Sheet DS41236B ...
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... Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Preliminary , microID, MPLAB, PIC, PICmicro, PICSTART, ® 8-bit MCUs ® code hopping EE OQ © 2005 Microchip Technology Inc. ...
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... Fully static design • Wide operating voltage range: 2.0V to 5.5V • Wide temperature range: - Industrial Extended: - +125 C Peripheral Features (PIC12F508/509): • 6 I/O pins I/O pins with individual direction control - 1 input only pin - High current sink/source for direct LED drive - Wake-on-change - Weak pull-ups • ...
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... PDIP, SOIC, TSSOP RB5/OSC1/CLKIN 2 3 RB4/OSC2/CLKOUT 12 RB3/MCLR RC5/T0CKI 6 9 RC4 RC3 8 7 Program Memory Device Flash (words) PIC12F508 PIC12F509 PIC16F505 DS41236B-page 2 PDIP, SOIC, MSOP RB0/ICSPDAT GP5/OSC1/CLKIN RB1/ICSPCLK GP4/OSC2 RB2 GP3/MCLR/V PP RC0 RC1 RC2 Data Memory SRAM (bytes) 512 25 1024 41 1024 72 Preliminary ...
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... Table of Contents 1.0 General Description...................................................................................................................................................................... 5 2.0 PIC12F508/509/16F505 Device Varieties ................................................................................................................................... 7 3.0 Architectural Overview ................................................................................................................................................................. 9 4.0 Memory Organization ................................................................................................................................................................. 15 5.0 I/O Port ....................................................................................................................................................................................... 29 6.0 Timer0 Module and TMR0 Register ........................................................................................................................................... 33 7.0 Special Features Of The CPU.................................................................................................................................................... 39 8.0 Instruction Set Summary ............................................................................................................................................................ 55 9.0 Development Support................................................................................................................................................................. 63 10.0 Electrical Characteristics ............................................................................................................................................................ 67 11.0 DC and AC Characteristics Graphs and Charts ......................................................................................................................... 79 12 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 4 Preliminary © 2005 Microchip Technology Inc. ...
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... In-Circuit Serial Programming Number of Instructions Packages The PIC12F508/509/16F505 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F508/509/16F505 device uses serial programming with data pin RB0/GP0 and clock pin RB1/GP1. © 2005 Microchip Technology Inc. ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 6 Preliminary © 2005 Microchip Technology Inc. ...
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... A variety of packaging options are available. Depend- ing on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC12F508/509/16F505 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 8 Preliminary © 2005 Microchip Technology Inc. ...
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... The PIC12F508/509/16F505 devices can directly or indirectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC12F508/509/ 16F505 devices have a highly orthogonal (symmetri- cal) instruction set that makes it possible to carry out any operation, on any register, using any addressing mode. This symmetrical nature and lack of “ ...
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... PIC12F508/509/16F505 FIGURE 3-1: PIC12F508/509 BLOCK DIAGRAM 12 Flash 512 1024 x 12 Program Memory Program 12 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2 Internal RC OSC MCLR DS41236B-page 10 8 Data Bus Program Counter RAM Stack 1 Stack 2 File Registers RAM Addr 9 Addr MUX ...
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... TABLE 3-2: PIC12F508/509 PINOUT DESCRIPTION Input Name Function Type GP0/ICSPDAT GP0 ICSPDAT GP1\ICSPCLK GP1 ICSPCLK GP2/T0CKI GP2 T0CKI GP3/MCLR/V GP3 PP MCLR V PP GP4/OSC2 GP4 OSC2 GP5/OSC1/CLKIN GP5 OSC1 XTAL CLKIN Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input © ...
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... PIC12F508/509/16F505 FIGURE 3-2: PIC16F505 BLOCK DIAGRAM 12 Program Counter Flash Program Memory Program 12 Bus Instruction Reg Direct Addr 8 Device Reset Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41236B-page 12 8 Data Bus RAM Stack 1 File Stack 2 Registers RAM Addr 9 Addr MUX ...
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... SS SS Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...
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... PIC12F508/509/16F505 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...
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... Figure 4-1). Accessing a location above these boundaries will cause a wraparound within the first 512 x 12 space (PIC12F508 space (PIC12F509). The effective Reset vector is a 0000h (see Figure 4-1). Location 01FFh (PIC12F508) and location 03FFh (PIC12F509) contain the internal clock oscillator calibration value. This value should never be overwritten. © ...
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... The General Purpose Registers are used for data and control information under command of the instructions. For the PIC12F508/509, the register file is composed of 7 Special Function Registers, 9 General Purpose Registers and General Purpose Registers accessed by banking (see Figure 4-3 and Figure 4-4). ...
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... FIGURE 4-3: PIC12F508 REGISTER FILE MAP File Address (1) INDF 00h 01h TMR0 PCL 02h STATUS 03h FSR 04h OSCCAL 05h GPIO 06h 07h General Purpose Registers 1Fh Note 1: Not a physical register. See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. ...
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... Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change Reset Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236B-page 18 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 ...
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... If Reset was due to wake-up on pin change, then bit All other Resets will cause bit Other (non Power-up) Resets include external reset through MCLR, Watchdog Timer and wake-up on pin change Reset. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...
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... These bits are set or cleared according to the device logic. Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the STATUS register as destination may be different than intended. REGISTER 4-1: STATUS REGISTER (ADDRESS: 03h) (PIC12F508/509) R/W-0 R/W-0 GPWUF bit 7 bit 7 ...
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... C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur borrow occurred Legend Readable bit -n = Value at POR © 2005 Microchip Technology Inc. PIC12F508/509/16F505 R/W-0 R-1 R-1 — PA0 TO PD SUBWF borrow did not occur Load bit with LSb or MSb, respectively W = Writable bit U = Unimplemented bit, read as ‘ ...
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... Timer0/WDT prescaler and Timer0. By executing the OPTION instruction, the contents of the W register will be transferred to the OPTION regis- ter. A Reset sets the OPTION<7:0> bits. REGISTER 4-3: OPTION REGISTER (PIC12F508/509) W-1 GPWU GPPU bit 7 bit 7 GPWU: Enable Wake-up on Pin Change bit (GP0, GP1, GP3) ...
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... Prescaler assigned to Timer0 bit 2-0 PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate WDT Rate 000 001 010 011 100 101 110 111 Legend Readable bit -n = Value at POR © 2005 Microchip Technology Inc. PIC12F508/509/16F505 W-1 W-1 W-1 W-1 T0CS T0SE PSA OSC ...
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... PIC12F508/509/16F505 4.6 OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the internal precision 4 MHz oscillator contains seven bits for calibration Note: Erasing the device will also erase the pre- programmed internal calibration value for the internal oscillator. The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later ...
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... Stack The PIC12F508/509/16F505 devices have a 2-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incre- mented by one, into Stack Level 1 ...
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... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC12F508 – Does not use banking. FSR <7:5> are unimplemented and read as ‘1’s. PIC12F509 – Uses FSR<5>. Selects between bank 0 and bank 1. FSR<7:6> is unimplemented, read as ‘1’. ...
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... Direct Addressing (FSR (opcode) Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Section 4.3 “Data Memory Organization”. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 28 Preliminary © 2005 Microchip Technology Inc. ...
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... Input/Output modes. On Reset, all I/O ports are defined as input (inputs are at high-impedance) since the I/O control registers are all set. Note: On the PIC12F508/509, I/O PORTB is ref- erenced as GPIO. On the PIC16F505, I/O PORTB is referenced as PORTB. 5.1 PORTB/GPIO PORTB/GPIO is an 8-bit I/O register. Only the low- order 6 bits are used (RB/GP< ...
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... Legend: Shaded cells are not used by Port registers, read as ‘0’. – = unimplemented, read as ‘0’ unknown unchanged depends on condition. Note 1: PIC12F508/509 only. 2: PIC16F505 only Reset was due to wake-up on pin change, then bit All other Resets will cause bit DS41236B-page 30 ...
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... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2005 Microchip Technology Inc. PIC12F508/509/16F505 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 32 Preliminary © 2005 Microchip Technology Inc. ...
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... Timer0 Instruction Executed © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Counter mode is selected by setting the T0CS bit (OPTION<5>). In this mode, Timer0 will increment either on every rising or falling edge of pin T0CKI. The T0SE bit (OPTION<4>) determines the source edge. Clearing the T0SE bit selects the rising edge. Restric- tions on the external clock input are discussed in detail in Section 6.1 “ ...
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... RBPU (1), (3) N/A TRISGPIO — (2), (3) N/A TRISC — Legend: Shaded cells are not used by Timer0. – = unimplemented unknown unchanged. Note 1: PIC12F508/509 only. 2: PIC16F505 only. 3: The TRIS of the T0CKI pin is overridden when T0CS = 1. DS41236B-page NT0 Write TMR0 Read TMR0 Read TMR0 ...
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... External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical. ...
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... PIC12F508/509/16F505 6.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer (WDT), respectively (see Section 7.6 “Watch- dog Timer (WDT)”). For simplicity, this counter is being referred to as “prescaler” throughout this data sheet. Note: The prescaler may be used by either the Timer0 module or the WDT, but not both ...
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... OSC (GP2/RC5)/T0CKI pin T0SE Watchdog Timer PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin RC5 on the PIC16F505 and pin GP2 on the PIC12F508/509. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Sync Cycles ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 38 Preliminary © 2005 Microchip Technology Inc. ...
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... FOSC<1:0>: Oscillator Selection bits 11 = EXTRC = external selection bits 10 = INTRC = internal RC oscillator oscillator oscillator Note 1: Refer to the “PIC12F508/509 Memory Programming Specifications” (DS41227) to determine how to access the Configuration Word. The Configuration Word is not user addressable during device operation. Legend Readable bit W = Writable bit -n = Value at POR ‘ ...
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... PIC12F508/509/16F505 REGISTER 7-2: CONFIGURATION WORD FOR PIC16F505 — — — — bit 11 bit 11-6 Unimplemented: Read as ‘0’ bit 5 MCLRE: RB3/MCLR Pin Function Select bit 1 = RB3/MCLR pin function is MCLR 0 = RB3/MCLR pin function is digital I/O, MCLR internally tied to V bit 4 CP: Code Protection bit ...
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... In HS (PIC16F505 modes, a crystal or ceramic resonator is connected to the (GP5/RB5)/ OSC1/(CLKIN) and (GP4/RB4)/OSC2/(CLKOUT) pins to establish oscillation (Figure 7-1). The PIC12F508/ 509/16F505 oscillator designs require the use of a parallel cut crystal. Use of a series cut crystal may give a frequency out of the crystal manufacturers specifications ...
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... The user also needs to take into account EXT variation due to tolerance of external R and C components used. Figure 7-5 shows how the R/C combination is con- nected to the PIC12F508/509/16F505 devices. For R values below 3 the oscillator operation may EXT become unstable, or stop completely. For very high R values (e ...
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... DD value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC12F508/509/16F505 devices, only bits <7:1> of OSCCAL are implemented. Bits CAL6-CAL0 are used for calibration. Adjusting CAL6-CAL0 from ‘0000000’ to ‘1111111’ changes the clock speed. See Register 4-5 for more information. ...
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... DS41236B-page 44 7.3.1 EXTERNAL CLOCK IN For applications where a clock is already available elsewhere, users may directly drive the PIC12F508/ 509/16F505 devices provided that this external clock source meets the AC/DC timing requirements listed in Section 7.6 “Watchdog Timer (WDT)”. Figure 7-6 below shows how an external clock circuit should be configured ...
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... MCLR Reset during Sleep WDT Reset during Sleep WDT Reset normal operation Wake-up from Sleep on pin change Legend unchanged unknown, – = unimplemented bit, read as ‘0’. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 MCLR Reset, WDT Time-out, Power-on Reset Wake-up On Pin Change (1) qqqq qqqu ...
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... MCLR SELECT GPWU/RBWU (GP3/RB3)/MCLR/V MCLRE 7.4 Power-on Reset (POR) The PIC12F508/509/16F505 devices incorporate an on-chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...
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... Internal POR DRT Time-out Internal Reset FIGURE 7-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset © 2005 Microchip Technology Inc. PIC12F508/509/16F505 POR (Power-on Reset) MCLR Reset Start-up Timer ( ms) TDRT Preliminary CHIP Reset TDRT ...
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... PIC12F508/509/16F505 FIGURE 7-11: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 DS41236B-page 48 V1 TDRT time-out expires long before V ...
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... Device Reset Timer (DRT) On the PIC12F508/509/16F505 devices, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 7-6). The DRT operates on an internal RC oscillator. The processor is kept in Reset as long as the DRT is active. ...
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... SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER Address Name Bit 7 Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F508/509 only. 2: PIC16F505 only. DS41236B-page Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 ...
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... A brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset PIC12F508/509/16F505 devices when a brown-out occurs, external brown-out protection circuits may be built, as shown in Figure 7-13 and Figure 7-14. ...
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... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC12F508/509/ 16F505 devices. 7.11 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code identification numbers ...
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... FIGURE 7-16: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections External Connector Signals + MCLR/V PP GP1/RB1 CLK Data I/O GP0/RB0 Normal Connections © 2005 Microchip Technology Inc. PIC12F508/509/16F505 PIC16F505 PIC12F508 PIC12F509 PP Preliminary DS41236B-page 53 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 54 Preliminary © 2005 Microchip Technology Inc. ...
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... In the set of User defined term (font is courier) italics © 2005 Microchip Technology Inc. PIC12F508/509/16F505 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... PIC12F508/509/16F505 TABLE 8-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW — Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 BCF Bit Clear f Syntax: [ label ] BCF Operands: ...
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... PIC12F508/509/16F505 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b Operands < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...
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... PC<10:9> Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two- cycle instruction. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 INCF Increment f Syntax: [ label ] Operands ...
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... PIC12F508/509/16F505 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands [0,1] Operation: (W).OR. (f) (dest) Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2005 Microchip Technology Inc. PIC12F508/509/16F505 SLEEP Syntax: Operands: Operation: Status Affected: TO, PD, RBWUF Description: ...
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... PIC12F508/509/16F505 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands Operation: (W) TRIS register f Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [label ] XORLW k Operands 255 Operation: (W) .XOR Status Affected: Z Description: The contents of the W register are XOR’ ...
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... Plus Development Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2005 Microchip Technology Inc. PIC12F508/509/16F505 9.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... PIC12F508/509/16F505 9.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PICmicro MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...
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... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 9.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...
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... PIC12F508/509/16F505 9.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PICmicro devices in DIP packages pins. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 ............................................................................... -0. > ...
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... PIC12F508/509/16F505 FIGURE 10-1: PIC12F508/509/16F505 VOLTAGE-FREQUENCY GRAPH, -40 C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 10-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT INTOSC XTRC 200 kHz DS41236B-page Frequency (MHz) 4 MHz Frequency (MHz) Preliminary T +125 MHz © 2005 Microchip Technology Inc. ...
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... DC Characteristics: PIC12F508/509/16F505 (Industrial) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-down Current PD (5) D022 I WDT Current WDT Legend: TBD = To Be Determined ...
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... PIC12F508/509/16F505 10.2 DC Characteristics: PIC12F508/509/16F505 (Extended) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-down Current PD (5) D022 ...
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... Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC12F508/509/ 16F505 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level ...
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... PIC12F508/509/16F505 TABLE 10-2: PULL-UP RESISTOR RANGES – PIC12F508/509/16F505 V (Volts) Temperature ( C) DD RB0/RB1/RB4 2.0 - 125 5.5 - 125 RB3 2.0 - 125 5.5 - 125 Legend: TBD = To Be determined. * These parameters are characterized but not tested. DS41236B-page 72 Min Typ TBD TBD TBD TBD TBD TBD ...
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... Timing Parameter Symbology and Load Conditions – PIC12F508/509/16F505 The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy Cycle time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...
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... PIC12F508/509/16F505 TABLE 10-3: EXTERNAL CLOCK TIMING REQUIREMENTS – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym Characteristic No External CLKIN Frequency OSC Oscillator Frequency 1 T External CLKIN Period OSC (2) Oscillator Period 2 T Instruction Cycle Time CY 3 TosL, Clock in (OSC1) Low or High TosH Time 4 TosR, Clock in (OSC1) Rise or Fall ...
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... TABLE 10-4: CALIBRATED INTERNAL RC FREQUENCIES – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym Characteristic No. F10 F Internal Calibrated OSC INTOSC Frequency Legend: TBD = To Be Determined. * These parameters are characterized but not tested. † Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested ...
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... PIC12F508/509/16F505 TABLE 10-5: TIMING REQUIREMENTS – PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) AC Operating Temperature CHARACTERISTICS Operating Voltage V Param Sym No OSC1 (Q1 cycle) to Port Out Valid OSC1 (Q2 cycle) to Port Input Invalid (I/O in hold time Port Input Valid to OSC1 (I/O in setup time Port Output Rise Time ...
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... TABLE 10-6: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym Characteristic No MCLR Pulse Width (low Watchdog Timer Time-out Period WDT (no prescaler Device Reset Timer Period DRT 34 T I/O High-impedance from MCLR IOZ low * These parameters are characterized but not tested. ...
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... PIC12F508/509/16F505 FIGURE 10-7: TIMER0 CLOCK TIMINGS – PIC12F508/509/16F505 T0CKI TABLE 10-7: TIMER0 CLOCK REQUIREMENTS – PIC12F508/509/16F505 AC CHARACTERISTICS Param Sym Characteristic No. 40 Tt0H T0CKI High Pulse Width 41 Tt0L T0CKI Low Pulse Width 42 Tt0P T0CKI Period * These parameters are characterized but not tested. ...
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... DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236B-page 79 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 80 Preliminary © 2005 Microchip Technology Inc. ...
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... Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Example 12F508-I /P017 0410 ...
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... PIC12F508/509/16F505 12.1 Package Marking Information (Cont’d) 14-Lead PDIP (300 mil) XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (150 mil) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (150 mil) XXXXXXXX YYWW NNN DS41236B-page 82 Example PIC16F505-I/PG 0215 0410017 Example PIC16F505-E /SLG0125 0431017 Example 16F505-I 0431 017 Preliminary © ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Units ...
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... PIC12F508/509/16F505 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-187 Drawing No. C04-111 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Units INCHES ...
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... PIC12F508/509/16F505 14-Lead Plastic Dual In-line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing § ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Units ...
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... PIC12F508/509/16F505 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... APPENDIX A: REVISION HISTORY Revision A (April 2004) Original data sheet for PIC12F508/509/16F505 devices Revision B (June 2005) Update packages © 2005 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236B-page 89 ...
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... PIC12F508/509/16F505 NOTES: DS41236B-page 90 Preliminary © 2005 Microchip Technology Inc. ...
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... MPLINK Object Linker/MPLIB Object Librarian .................. 64 O Option Register................................................................... 22 OSC selection..................................................................... 39 OSCCAL Register............................................................... 24 Oscillator Configurations..................................................... 41 Oscillator Types HS............................................................................... 41 LP ............................................................................... 41 RC .............................................................................. 41 XT ............................................................................... 41 P PIC12F508/509/16F505 Device Varieties ............................ 7 PICSTART Plus Development Programmer....................... 66 POR Device Reset Timer (DRT) ................................... 39, 49 PD............................................................................... 51 Power-on Reset (POR)............................................... 39 TO............................................................................... 51 PORTB ............................................................................... 29 Power-down Mode.............................................................. 52 Prescaler ............................................................................ 36 Program Counter ................................................................ cycles ...
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... PIC12F508/509/16F505 W Wake-up from Sleep ........................................................... 52 Watchdog Timer (WDT) ................................................ 39, 49 Period.......................................................................... 49 Programming Considerations ..................................... 49 WWW Address.................................................................... 93 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41236B-page 92 Preliminary © 2005 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2005 Microchip Technology Inc. PIC12F508/509/16F505 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC12F508/509/16F505 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... PIC16F505T-I/SL = Industrial temp., SOIC package (Pb-free), Tape and Reel c) PIC16F505T-I/SL = Industrial temp., SOIC package (Pb-free), Tape and Reel d) PIC12F508T-I/SN = Industrial temp., 150 mil SOIC package (Pb-free), Tape and Reel e) PIC12F508T-E/MS = Extended temp., MSOP package (Pb-free), Tape and Reel f) PIC12F509-E/P = Extended temp., PDIP ...
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... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...