PIC16F73-I/SO Microchip Technology Inc., PIC16F73-I/SO Datasheet - Page 21
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PIC16F73-I/SO
Manufacturer Part Number
PIC16F73-I/SO
Description
28 PIN, 7 KB FLASH, 192 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F73-ISO.pdf
(174 pages)
Specifications of PIC16F73-I/SO
A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F73-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.2.2.1
The STATUS register contains the arithmetic status of
the ALU, the RESET status and the bank select bits for
data memory.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC, or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable, therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
REGISTER 2-1:
2002 Microchip Technology Inc.
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS Register
STATUS REGISTER (ADDRESS 03h, 83h, 103h, 183h)
Legend:
R = Readable bit
- n = Value at POR reset
bit 7
IRP: Register Bank Select bit (used for indirect addressing)
1 = Bank 2, 3 (100h - 1FFh)
0 = Bank 0, 1 (00h - FFh)
RP1:RP0: Register Bank Select bits (used for direct addressing)
11 = Bank 3 (180h - 1FFh)
10 = Bank 2 (100h - 17Fh)
01 = Bank 1 (80h - FFh)
00 = Bank 0 (00h - 7Fh)
Each bank is 128 bytes
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
: Zero bit
R/W-0
Note:
IRP
For borrow, the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low order bit of the source register.
R/W-0
RP1
R/W-0
RP0
W = Writable bit
’1’ = Bit is set
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect the Z, C, or DC bits from the STATUS register.
For other instructions not affecting any status bits, see
the "Instruction Set Summary."
R-1
TO
Note 1: The C and DC bits operate as a borrow
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
and digit borrow bit, respectively, in sub-
traction. See the SUBLW and SUBWF
instructions for examples.
R-1
PD
R/W-x
Z
PIC16F7X
x = Bit is unknown
R/W-x
DC
DS30325B-page 19
R/W-x
C
bit 0