PIC12C508A-04/P Microchip Technology Inc., PIC12C508A-04/P Datasheet - Page 17
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PIC12C508A-04/P
Manufacturer Part Number
PIC12C508A-04/P
Description
8 PIN, 0.75 KB OTP, 25 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12C508A-04P.pdf
(113 pages)
Specifications of PIC12C508A-04/P
Cpu Speed
1 MIPS
Eeprom Memory
0 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
768 Bytes
Ram Size
25 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12C508A-04/P
Manufacturer:
MICROCHIPS
Quantity:
482
Part Number:
PIC12C508A-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
4.4
The OPTION register is a 8-bit wide, write-only
register which contains various control bits to
configure the Timer0/WDT prescaler and Timer0.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION
register. A RESET sets the OPTION<7:0> bits.
FIGURE 4-5:
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-0:
GPWU
W-1
OPTION Register
GPWU: Enable wake-up on pin change (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
GPPU: Enable weak pull-ups (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
T0CS: Timer0 clock source select bit
1 = Transition on T0CKI pin
0 = Transition on internal instruction cycle clock, Fosc/4
T0SE: Timer0 source edge select bit
1 = Increment on high to low transition on the T0CKI pin
0 = Increment on low to high transition on the T0CKI pin
PSA: Prescaler assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
PS2:PS0: Prescaler rate select bits
Bit Value
GPPU
W-1
000
001
010
011
100
101
110
111
6
OPTION REGISTER
T0CS
Timer0 Rate
W-1
5
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
W-1
4
WDT Rate
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
PSA
W-1
3
W-1
PS2
2
Note:
Note:
PS1
W-1
1
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin; i.e., note that TRIS overrides
OPTION control of GPPU and GPWU.
If the T0CS bit is set to ‘1’, GP2 is forced to
be an input even if TRIS GP2 = ‘0’.
PS0
W-1
bit0
W = Writable bit
U = Unimplemented bit
- n = Value at POR reset
Reference Table 4-1 for
other resets.
PIC12C5XX
DS40139E-page 17