ICS1893Y-10 IDT, Integrated Device Technology Inc, ICS1893Y-10 Datasheet - Page 119
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ICS1893Y-10
Manufacturer Part Number
ICS1893Y-10
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Specifications of ICS1893Y-10
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Not Compliant
Other names
1893Y-10
800-1934-5
ICS1893Y-10
800-1934-5
ICS1893Y-10
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9.3.4.3
ICS1893 Rev C 6/6/00
Table 9-7
Table 9-7.
COL
CRS
MDC
MDIO
RXCLK
RXD0
RXD1,
RXD2,
RXD3
MAC/Repeater Interface Pins for 10M Serial Interface
MII Pin
Name
ICS1893 - Release
lists the MAC/Repeater Interface pin descriptions for the 10M Serial Interface.
10COL
10CRS
MDC
MDIO
10RCLK
10RD
–
MAC/Repeater Interface Pins: 10M Serial Interface
Symbol
Name
100M
Pin
No.
Pin
34,
33,
49
50
31
30
38
35
32
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Connect
Output
Output
Output
Output
Input/
Type
Input
Pin
No
10M (Serial Interface) Collision (Detect).
This pin’ s description is the same as that given in
10M (Serial Interface) Carrier Sense.
This pin’ s description is the same as that given in
Management Data Clock.
This pin’ s description is the same as that given in
Management Data Input/Output.
This pin’ s description is the same as that given in
10M Receive Clock.
In 10M Serial mode, the ICS1893 sources the 10RCLK to its
MAC/repeater Interface. The 10RCLK synchronizes the data on
the 10RD0 pin between the ICS1893 and the MAC/repeater.
10M (Serial Interface) Receive Data 0.
This pin’ s description is the same as that given in
Receive Data 1–3.
For the 10M Serial Interface, these pins are a no connect. For
more information, see
•
•
•
•
Note: The signal on the 10RCLK pin is conditioned by the
The 10RCLK frequency is 10 MHz.
The ICS1893 generates 10RCLK from the MDI data stream
using a digital PLL. When the MDI data stream terminates,
the PLL continues to operate, synchronously referenced to
the last packet received.
The ICS1893 switches between clock sources during the
period between when 10CRS is being asserted and
10RXDV is being asserted. While the ICS1893 locks onto
the incoming data stream, a clock phase change of up to 360
degrees can occur.
The 10RCLK aligns once per packet.
119
RXTRI pin.
Chapter 9 Pin Diagram, Listings, and Descriptions
Table
Pin Description
6-2.
Table
Table
Table
Table
Table
June, 2000
9-5.
9-5.
9-5.
9-5.
9-5.