25LC512-I/P Microchip Technology Inc., 25LC512-I/P Datasheet
25LC512-I/P
Specifications of 25LC512-I/P
Available stocks
Related parts for 25LC512-I/P
25LC512-I/P Summary of contents
Page 1
... PDIP, SOIC, and advanced 8-lead DFN package. All packages are Pb-free and RoHS compliant. Package Types (not to scale) DFN (MF *25XX512 is used in this document as a generic part number for the 25AA512, 25LC512 devices. Preliminary Packages P, SN, SM SN, SM, MF PDIP/SOIC/SOIJ (P, SN, SM HOLD HOLD SCK ...
Page 2
... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................6.5V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C ESD protection on all pins ..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...
Page 3
... This parameter is not tested but established by characterization and qualification. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from our web site at www.microchip.com. 3: Includes T time. HI © 2007 Microchip Technology Inc. 25AA512/25LC512 Industrial (I 0°C to +85°C A Industrial (I -40° ...
Page 4
... TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS Param. Sym. Characteristic No HOLD low to output HZ High HOLD high to output valid High to Standby mode REL High to Deep power- PD down 22 T Chip erase cycle time Sector erase cycle time Internal write cycle time WC 25 — Endurance Note 1: This parameter is periodically sampled and not 100% tested ...
Page 5
... Don’t Care HOLD FIGURE 1-2: SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI © 2007 Microchip Technology Inc. 25AA512/25LC512 High-Impedance 14 Don’t Care Preliminary High-Impedance Don’t Care ...
Page 6
... FUNCTIONAL DESCRIPTION 2.1 Principles of Operation The 25XX512 is a 65,536 byte Serial EEPROM designed to interface directly with the Serial Periph- eral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC microcontrollers. It may also interface with microcon- ...
Page 7
... High-Impedance SO © 2007 Microchip Technology Inc. 25AA512/25LC512 provide clock pulses. The internal Address Pointer is automatically incremented to the next higher address after each byte of data is shifted out. When the highest address is reached (FFFFh), the address counter rolls over to address 0000h allowing the read cycle to be continued indefinitely ...
Page 8
... Write Sequence Prior to any attempt to write data to the 25XX512, the write enable latch must be set by issuing the WREN instruction (Figure 2-4). This is done by setting CS low and then clocking out the proper instruction into the 25XX512. After all eight bits of the instruction are trans- mitted, the CS must be brought high to set the write enable latch ...
Page 9
... FIGURE 2-3: PAGE WRITE SEQUENCE SCK Instruction SCK Data Byte © 2007 Microchip Technology Inc. 25AA512/25LC512 16-bit Address Data Byte Preliminary Data Byte Data Byte n (128 max DS22021B-page 9 ...
Page 10
... Write Enable (WREN) and Write Disable (WRDI) The 25XX512 contains a write enable latch. Table 2-4 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. ...
Page 11
... SI High-Impedance SO © 2007 Microchip Technology Inc. 25AA512/25LC512 The Write Enable Latch (WEL) bit indicates the status of the write enable latch and is read-only. When set to a ‘ 1 ’, the latch allows writes to the array, when set to a ‘ 0 ’, the latch prohibits writes to the array. The state of ...
Page 12
... Write Status Register Instruction (WRSR) The Write Status Register instruction (WRSR) allows the user to write to the nonvolatile bits in the STATUS register as shown in Table 2-2. The user is able to select one of four levels of protection for the array by writing to the appropriate bits in the STATUS register. ...
Page 13
... Microchip Technology Inc. 25AA512/25LC512 2.7 Power-On State The 25XX512 powers on in the following state: • The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to ...
Page 14
... PAGE ERASE The PAGE ERASE instruction will erase all bits (FFh) inside the given page. A Write Enable (WREN) instruc- tion must be given prior to attempting a PAGE ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25XX512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...
Page 15
... SO © 2007 Microchip Technology Inc. 25AA512/25LC512 CS must then be driven high after the last bit of the address or the SECTOR ERASE will not execute. Once the CS is driven high the self-timed SECTOR ERASE cycle is started. The WIP bit in the STATUS register can be read to determine when the SECTOR ERASE cycle is complete ...
Page 16
... CHIP ERASE The CHIP ERASE instruction will erase all bits (FFh) in the array. A Write Enable (WREN) instruction must be given prior to executing a CHIP ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25XX512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...
Page 17
... CS SCK SI SO © 2007 Microchip Technology Inc. 25AA512/25LC512 All instructions given during Deep Power-Down mode are ignored except the Read Electronic Signature command (RDID). The RDID command will release the device from Deep power-down and outputs the electronic signature on the SO pin, and then returns ...
Page 18
... RELEASE FROM DEEP POWER- DOWN AND READ ELECTRONIC SIGNATURE Once the device has entered Deep Power-Down mode all instructions are ignored except the Release from Deep Power-down and Read Electronic Signa- ture command. This command can also be used when ...
Page 19
... Hold (HOLD) The HOLD pin is used to suspend transmission to the 25LC512 while in the middle of a serial sequence with- out having to re-transmit the entire sequence over again. It must be held high any time this function is not being used. Once the device is selected and a serial ...
Page 20
... Example: 25LC512I e SN 0728 3 1L7 Example: 25LC512 e I/SM 3 07281L7 Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code (2 characters for small packages) ...
Page 21
... Package may have one or more exposed tie bars at ends. 3. Package is saw singulated. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc. 25AA512/25LC512 EXPOSED PAD BOTTOM VIEW ...
Page 22
... Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width ...
Page 23
... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc. 25AA512/25LC512 ...
Page 24
... Plastic Small Outline (SM) – Medium, 5.28 mm Body [SOIJ] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width ...
Page 25
... Revision A Original release. Revision B (06/2007) Revised Device Selection Table; Revised Features section; Revised Table 1-1 DC Characteristics; Revised Table 1-2 AC Characteristics; Replaced Pack- age Drawings (Rev. AP); Revised Package Marking (SOIC, SOIJ); Revised Product ID section. © 2007 Microchip Technology Inc. 25AA512/25LC512 Preliminary DS22021B-page 25 ...
Page 26
... NOTES: DS22021B-page 26 Preliminary © 2007 Microchip Technology Inc. ...
Page 27
... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. 25AA512/25LC512 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
Page 28
... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 25AA512/25LC512 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
Page 29
... EEPROM, Industrial temp., Tape & Reel, DFN package 25LC512-I/SM = 512 Kbit, 2.5V Serial EEPROM, Industrial temp., SOIJ package 25LC512-I/P = 512 Kbit, 2.5V Serial EEPROM, Industrial temp., P-DIP package 25LC512T-E/MF = 512 Kbit, 2.5V Serial EEPROM, Extended temp., Tape & Reel, DFN package ...
Page 30
... NOTES: DS22021B-page 30 Preliminary © 2007 Microchip Technology Inc. ...
Page 31
... Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. © 2007 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, K ...
Page 32
... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...