DSPIC33FJ128MC710-I/PT Microchip Technology Inc., DSPIC33FJ128MC710-I/PT Datasheet - Page 222
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DSPIC33FJ128MC710-I/PT
Manufacturer Part Number
DSPIC33FJ128MC710-I/PT
Description
DSP, 16-Bit, 128KB Flash, 16KB RAM, 85 I/O, TQFP-100
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ64MC506-IPT.pdf
(370 pages)
Specifications of DSPIC33FJ128MC710-I/PT
A/d Inputs
24-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
85
Interface
CAN, I2C, SPI, UART/USART
Ios
85
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
16K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
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DSPIC33FJ128MC710-I/PT
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dsPIC33F
REGISTER 18-2:
DS70165E-page 220
bit 3
bit 2
bit 1
bit 0
S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop detected.
R_W: Read/Write Information bit (when operating as I
1 = Read – indicates data transfer is output from slave
0 = Write – indicates data transfer is input to slave
Hardware set or clear after reception of I
RBF: Receive Buffer Full Status bit
1 = Receive complete, I2CxRCV is full
0 = Receive not complete, I2CxRCV is empty
Hardware set when I2CxRCV is written with received byte. Hardware clear when software
reads I2CxRCV.
TBF: Transmit Buffer Full Status bit
1 = Transmit in progress, I2CxTRN is full
0 = Transmit complete, I2CxTRN is empty
Hardware set when software writes I2CxTRN. Hardware clear at completion of data transmission.
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)
Preliminary
2
C device address byte.
2
C slave)
© 2007 Microchip Technology Inc.
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