PIC24FJ64GA002-I/SP Microchip Technology Inc., PIC24FJ64GA002-I/SP Datasheet - Page 203

• Manufacturer Part Number: PIC24FJ64GA002-I/SP
• Description: MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA002-I/SP

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

23.0
PIC24FJ64GA family devices include several features
intended to maximize application flexibility and reli-
ability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming
• In-Circuit Emulation
23.1
The Configuration bits can be programmed (read as ‘0’),
or left unprogrammed (read as ‘1’), to select various
device configurations. These bits are mapped starting at
program memory location F80000h. A complete list is
shown in Table 23-1. A detailed explanation of the vari-
ous bit functions is provided in Register 23-1 through
Register 23-4.
Note that address F80000h is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh) which can only be
accessed using table reads and table writes.
23.1.1
In PIC24FJ64GA004 family devices, the configuration
bytes are implemented as volatile memory. This means
that configuration data must be programmed each time
the device is powered up. Configuration data is stored
in the two words at the top of the on-chip program
memory space, known as the Flash Configuration
Words. Their specific locations are shown in
Table 23-1. These are packed representations of the
actual device Configuration bits, whose actual
locations are distributed among five locations in config-
uration space. The configuration data is automatically
loaded from the Flash Configuration Words to the
proper Configuration registers during device Resets.
© 2007 Microchip Technology Inc.
Note:
Note:
SPECIAL FEATURES
Configuration Bits
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
associated “PIC24F Family Reference
Manual” chapter.
CONSIDERATIONS FOR
CONFIGURING PIC24FJ64GA004
FAMILY DEVICES
Configuration data is reloaded on all types
of device Resets.
PIC24FJ64GA004 FAMILY
Preliminary
TABLE 23-1:
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The Configuration bits are reloaded from the Flash
Configuration Word on any device Reset.
The upper byte of both Flash Configuration Words in
program memory should always be ‘1111 1111’. This
makes them appear to be NOP instructions in the
remote event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘1’s to these
locations has no effect on device operation.
PIC24FJ16GA
PIC24FJ32GA
PIC24FJ48GA
PIC24FJ64GA
Device
FLASH CONFIGURATION
WORD LOCATIONS FOR
PIC24FJ64GA004 FAMILY
DEVICES
00ABFEh
002BFEh
0057FEh
0083FEh
Configuration Word
1
Addresses
DS39881B-page 201
002BFCh
00ABFCh
0057FCh
0083FCh
2