PIC16F819-I/SO Microchip Technology Inc., PIC16F819-I/SO Datasheet - Page 46

• Manufacturer Part Number: PIC16F819-I/SO
• Description: 18 PIN, 3.5 KB FLASH, 256 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F819-I/SO

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F818/819
TABLE 5-3:
TABLE 5-4:
DS39598E-page 44
RB0/INT
RB1/SDI/SDA
RB2/SDO/CCP1
RB3/CCP1/PGM
RB4/SCK/SCL
RB5/SS
RB6/T1OSO/T1CKI/
PGC
RB7/T1OSI/PGD
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
06h, 106h PORTB
86h, 186h TRISB
81h, 181h OPTION_REG RBPU
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
Address
2:
3:
4:
5:
Name
This buffer is a Schmitt Trigger input when configured as the external interrupt.
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
Low-Voltage ICSP™ Programming (LVP) is enabled by default which disables the RB3 I/O function. LVP
must be disabled to enable RB3 as an I/O pin and allow maximum compatibility to the other 18-pin
mid-range devices.
This buffer is a Schmitt Trigger input when configured for CCP or SSP mode.
This buffer is a Schmitt Trigger input when configured for SPI or I
Name
(3)
PORTB FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
PORTB Data Direction Register
Bit 7
RB7
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
Buffer
INTEDG
TTL
Bit 6
RB6
(1)
(5)
(4)
(2)
(5)
(2)
(2)
Input/output pin or external interrupt input.
Internal software programmable weak pull-up.
Input/output pin, SPI™ data input pin or I
Internal software programmable weak pull-up.
Input/output pin, SPI data output pin or
Capture input/Compare output/PWM output pin.
Internal software programmable weak pull-up.
Input/output pin, Capture input/Compare output/PWM output pin
or programming in LVP mode. Internal software programmable
weak pull-up.
Input/output pin or SPI and I
Internal software programmable weak pull-up.
Input/output pin or SPI slave select pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Input/output pin, Timer1 oscillator output pin, Timer1 clock input pin or
serial programming clock (with interrupt-on-change).
Internal software programmable weak pull-up.
Input/output pin, Timer1 oscillator input pin or serial programming data
(with interrupt-on-change).
Internal software programmable weak pull-up.
T0CS
Bit 5
RB5
T0SE
Bit 4
RB4
Bit 3
PSA
RB3
Bit 2
RB2
PS2
2
C clock pin (with interrupt-on-change).
2
Function
C mode.
Bit 1
RB1
PS1
Bit 0
RB0 xxxx xxxx uuuu uuuu
PS0 1111 1111 1111 1111
 2004 Microchip Technology Inc.
2
C™ data I/O pin.
1111 1111 1111 1111
POR, BOR
Value on
Value on
all other
Resets