PIC16F1827-I/ML Microchip Technology Inc., PIC16F1827-I/ML Datasheet - Page 220
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-I/ML
Manufacturer Part Number
PIC16F1827-I/ML
Description
28 QFN 6x6mm TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-I/ML
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin QFN
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
- Current page: 220 of 406
- Download datasheet (4Mb)
PIC16(L)F1826/27
24.4.3
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
CCPxAS<2:0> bits of the CCPxAS register. A shutdown
event may be generated by:
• A logic ‘0’ on the INT pin
• A logic ‘1’ on a Comparator (Cx) output
A shutdown condition is indicated by the CCPxASE
(Auto-Shutdown Event Status) bit of the CCPxAS
register. If the bit is a ‘0’, the PWM pins are operating
normally. If the bit is a ‘1’, the PWM outputs are in the
shutdown state.
When a shutdown event occurs, two things happen:
The CCPxASE bit is set to ‘1’. The CCPxASE will
remain set until cleared in firmware or an auto-restart
occurs (see
The enabled PWM pins are asynchronously placed in
their shutdown states. The PWM output pins are
grouped into pairs [PxA/PxC] and [PxB/PxD]. The state
of each pin pair is determined by the PSSxAC and
PSSxBD bits of the CCPxAS register. Each pin pair may
be placed into one of three states:
• Drive logic ‘1’
• Drive logic ‘0’
• Tri-state (high-impedance)
FIGURE 24-14:
DS41391D-page 220
Shutdown
PWM
CCPxASE bit
ENHANCED PWM
AUTO-SHUTDOWN MODE
Section 24.4.4 “Auto-Restart
Activity
Event
PWM AUTO-SHUTDOWN WITH FIRMWARE RESTART (PXRSEN = 0)
Overflow
Timer
Start of
PWM Period
PWM Period
(Auto-Shutdown)
Mode”).
Event Occurs
Missing Pulse
Overflow
Shutdown
Timer
Event Clears
Overflow
Shutdown
Timer
Note 1: The
2: Writing to the CCPxASE bit of the
3: Once the auto-shutdown condition has
4: Prior to an auto-shutdown event caused
Missing Pulse
(CCPxASE not clear)
level-based signal, not an edge-based
signal. As long as the level is present, the
auto-shutdown will persist.
CCPxAS register is disabled while an
auto-shutdown condition persists.
been removed and the PWM restarted
(either through firmware or auto-restart)
the PWM signal will always restart at the
beginning of the next PWM period.
by a comparator output or INT pin event,
a software shutdown can be triggered in
firmware by setting the CCPxASE bit of
the
Auto-Restart feature tracks the active
status of a shutdown caused by a
comparator output or INT pin event only.
If it is enabled at this time, it will
immediately clear this bit and restart the
ECCP module at the beginning of the
next PWM period.
Overflow
Cleared by
CCPxASE
Firmware
Timer
CCPxAS
auto-shutdown
PWM
Resumes
2011 Microchip Technology Inc.
register
Overflow
condition
Timer
to
‘1’.
is
The
a
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