PIC16F887-I/PT Microchip Technology Inc., PIC16F887-I/PT Datasheet - Page 150

• Manufacturer Part Number: PIC16F887-I/PT
• Description: MCU, 8-Bit, 8KW Flash, 368 RAM, 36 I/O, TQFP-44
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F887-I/PT

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 35
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TFQP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F882/883/884/886/887
TABLE 11-6:
TABLE 11-7:
DS41291D-page 148
CCP1CON
CCP2CON
CCPR1L
CCPR1H
CCPR2L
CCPR2H
CM2CON1
INTCON
PIE1
PIE2
PIR1
PIR2
T1CON
TMR1L
TMR1H
TRISC
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture and
CCP1CON
CCP2CON
ECCPAS
INTCON
PR2
PSTRCON
PWM1CON
T2CON
TMR2
TRISB
TRISC
TRISD
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.
Name
Name
Compare.
Capture/Compare/PWM Register 1 Low Byte (LSB)
Capture/Compare/PWM Register 1 High Byte (MSB)
Capture/Compare/PWM Register 2 Low Byte (LSB)
Capture/Compare/PWM Register 2 High Byte (MSB)
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Period Register
Timer2 Module Register
ECCPASE
MC1OUT
T1GINV
TRISC7
TRISB7
TRISC7
TRISD7
PRSEN
OSFIE
OSFIF
Bit 7
P1M1
Bit 7
P1M1
GIE
GIE
—
—
—
—
—
—
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
REGISTERS ASSOCIATED WITH PWM AND TIMER2
ECCPAS2
TOUTPS3
MC2OUT
TMR1GE
TRISC6
TRISB6
TRISC6
TRISD6
P1M0
P1M0
PDC6
Bit 6
Bit 6
PEIE
ADIE
ADIF
PEIE
C2IE
C2IF
—
—
—
ECCPAS1
TOUTPS2
T1CKPS1
C1RSEL
TRISC5
TRISC5
TRISD5
TRISB5
DC1B1
DC2B1
DC1B1
DC2B1
PDC5
Bit 5
RCIE
Bit 5
C1IE
RCIF
C1IF
T0IE
T0IE
—
STRSYNC
ECCPAS0
TOUTPS1
T1CKPS0
C2RSEL
TRISC4
TRISB4
TRISC4
TRISD4
DC1B0
DC2B0
DC1B0
DC2B0
PDC4
Bit 4
Bit 4
INTE
TXIE
EEIE
EEIF
INTE
TXIF
Preliminary
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
CCP1M3
CCP2M3
PSSAC1
TRISC3
TRISC3
TRISD3
TRISB3
SSPIE
BCLIE
SSPIF
BCLIF
STRD
PDC3
Bit 3
Bit 3
RBIE
RBIE
—
ULPWUIE
ULPWUIF
CCP2M2
CCP2M2
TMR2ON
CCP1M2
T1SYNC
CCP1M2
PSSAC0
CCP1IE
CCP1IF
TRISC2
TRISC2
TRISD2
TRISB2
STRC
PDC2
Bit 2
Bit 2
T0IF
T0IF
—
T2CKPS1
CCP1M1
CCP2M1
TMR1CS
CCP1M1
CCP2M1
PSSBD1
TMR2IE
TMR2IF
TRISC1
TRISC1
TRISD1
TRISB1
T1GSS
STRB
PDC1
Bit 1
Bit 1
INTF
INTF
—
—
T2CKPS0
CCP1M0
CCP2M0
C2SYNC
TMR1ON
CCP1M0
CCP2M0
PSSBD0
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISC0
TRISC0
TRISD0
TRISB0
STRA
PDC0
Bit 0
Bit 0
RBIF
RBIF
© 2007 Microchip Technology Inc.
POR, BOR
POR, BOR
0000 0000
--00 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 --10
0000 000x
-000 0000
0000 00-0
-000 0000
0000 00-0
0000 0000
xxxx xxxx
xxxx xxxx
1111 1111
0000 0000
--00 0000
0000 0000
0000 000x
1111 1111
---0 0001
0000 0000
-000 0000
0000 0000
1111 1111
1111 1111
1111 1111
Value on
Value on
0000 0000
--00 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 --10
0000 000x
-000 0000
0000 00-0
-000 0000
0000 00-0
0000 0000
xxxx xxxx
xxxx xxxx
1111 1111
0000 0000
--00 0000
0000 0000
0000 000x
1111 1111
---0 0001
0000 0000
-000 0000
0000 0000
1111 1111
1111 1111
1111 1111
Value on
Value on
all other
all other
Resets
Resets