ENC28J60/SP Microchip Technology Inc., ENC28J60/SP Datasheet - Page 49
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ENC28J60/SP
Manufacturer Part Number
ENC28J60/SP
Description
28 PIN, 8 KB RAM, MAC&PHY, ETHERNET CONTROLLER
Manufacturer
Microchip Technology Inc.
Type
Controllerr
Datasheet
1.ENC28J60SP.pdf
(96 pages)
Specifications of ENC28J60/SP
Package Type
28-pin SSOP
Voltage, Supply
3.14-3.45 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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8.0
To minimize the processing requirements of the host
controller, the ENC28J60 incorporates several different
receive filters which can automatically reject packets
which are not needed. Six different types of packet
filters are implemented:
• Unicast
• Pattern Match
• Magic Packet™
• Hash Table
• Multicast
• Broadcast
© 2006 Microchip Technology Inc.
RECEIVE FILTERS
Preliminary
The individual filters are all configured by the ERXFCON
register (Register 8-1). More than one filter can be active
at any given time. Additionally, the filters can be config-
ured by the ANDOR bit to either logically AND, or
logically OR, the tests of several filters. In other words,
the filters may be set so that only packets accepted by
all active filters are accepted, or a packet accepted by
any one filter is accepted. The flowcharts in Figure 8-1
and Figure 8-2 show the effect that each of the filters will
have depending on the setting of ANDOR.
The device can enter Promiscuous mode and receive
all packets by clearing the ERXFCON register. The
proper setting of the register will depend on the
application requirements.
ENC28J60
DS39662B-page 47
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