ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 79

• Manufacturer Part Number: ISP1504A1ETTM
• Description: IC USB TXRX HS 36-TFBGA
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1504A1ETTM

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1504A1ET-T; ISP1504A1ET-T

NXP Semiconductors
24. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. RXCMD A_VBUS_VLD indicator source . . . . . . .29
Fig 11. Example of register write, register read,
Fig 12. USB reset and high-speed detection
Fig 13. Example of using the ISP1504x1 to transmit and
Fig 14. High-speed transmit-to-transmit packet timing. . .35
Fig 15. High-speed receive-to-transmit packet timing . . .36
Fig 16. Preamble sequence . . . . . . . . . . . . . . . . . . . . . . .37
Fig 17. Full-speed suspend and resume . . . . . . . . . . . . .38
Fig 18. High-speed suspend and resume . . . . . . . . . . . .40
Fig 19. Remote wake-up from low-power mode . . . . . . .42
Fig 20. Transmitting USB packets without automatic
Fig 21. Example of transmit followed by receive in
Fig 22. Example of transmit followed by receive in
Fig 23. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .64
Fig 24. Timing of TX_DAT and TX_SE0 to DP and DM . .64
Fig 25. Timing of TX_ENABLE to DP and DM. . . . . . . . .64
Fig 26. Timing of DP and DM to RX_RCV, RX_DP and
Fig 27. ULPI timing interface . . . . . . . . . . . . . . . . . . . . . .65
Fig 28. Bus turnaround timing . . . . . . . . . . . . . . . . . . . . .65
Fig 29. Using the ISP1504x1 with a standard USB
Fig 30. Using the ISP1504x1 with an OTG Controller;
Fig 31. Using the ISP1504x1 with a standard USB Host
Fig 32. Package outline SOT912-1 (TFBGA36). . . . . . . .70
ISP1504A1_ISP1504C1_1
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration TFBGA36; top view . . . . . . . . . .5
Application circuit components . . . . . . . . . . . . . .12
Entering and exiting 3-state in normal mode . . . .18
Internal power-on reset timing . . . . . . . . . . . . . . .21
Power-up and reset sequence required before
the ULPI bus is ready for use. . . . . . . . . . . . . . . .23
Interface behavior with respect to RESET_N. . . .24
Interface behavior with respect to
CS_N/PWRDN. . . . . . . . . . . . . . . . . . . . . . . . . . .25
Single and back-to-back RXCMDs from the
ISP1504x1 to the link . . . . . . . . . . . . . . . . . . . . . .27
extended register write and extended register
read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
handshake (chirp) sequence . . . . . . . . . . . . . . . .33
receive USB data . . . . . . . . . . . . . . . . . . . . . . . . .34
SYNC and EOP generation . . . . . . . . . . . . . . . . .43
6-pin serial mode . . . . . . . . . . . . . . . . . . . . . . . . .45
3-pin serial mode . . . . . . . . . . . . . . . . . . . . . . . . .45
RX_DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
Peripheral Controller; external crystal . . . . . . . . .67
external 5 V source with built-in FAULT and
external square wave input on pin XTAL1 . . . . . .68
Controller; external 5 V source with built-in
FAULT and external crystal . . . . . . . . . . . . . . . . .69
Rev. 01 — 6 August 2007
Fig 33. Temperature profiles for large and small
ISP1504A1; ISP1504C1
components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
ULPI HS USB OTG transceiver
© NXP B.V. 2007. All rights reserved.
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