PIC18F43K22T-I/ML Microchip Technology Inc., PIC18F43K22T-I/ML Datasheet - Page 393

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PIC18F43K22T-I/ML

Manufacturer Part Number
PIC18F43K22T-I/ML
Description
8KB, FLASH, 3968BYTES-RAM, 8-BIT FAMILY, NANOWATT XLP, 44 QFN 8X8X0.9MM T/R
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F43K22T-I/ML

A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin QFN
Programmable Memory
8K Bytes
Ram Size
512 Bytes
Speed
48 MHz
Temperature Range
–40 to 125 °C
Timers
1-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
W
Q1
=
Move literal to W
MOVLW k
0  k  255
k  W
None
The eight-bit literal ‘k’ is loaded into W.
1
1
MOVLW
literal ‘k’
Read
0000
Q2
5Ah
1110
5Ah
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
Preliminary
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18(L)F2X/4XK22
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
Move W to f
MOVWF
0  f  255
a  [0,1]
(W)  f
None
Move data from W to register ‘f’.
Location ‘f’ can be anywhere in the
256-byte bank.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
MOVWF
Read
0110
Q2
4Fh
FFh
4Fh
4Fh
REG, 0
f {,a}
111a
Process
Data
Q3
DS41412D-page 393
ffff
for details.
register ‘f’
Write
Q4
ffff

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