PIC12CE519-04I/SM Microchip Technology Inc., PIC12CE519-04I/SM Datasheet - Page 50

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PIC12CE519-04I/SM

Manufacturer Part Number
PIC12CE519-04I/SM
Description
8 PIN, 1.5 KB OTP, 41 RAM, 6 I/O, SOIC
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12CE519-04I/SM

Cpu Speed
1 MIPS
Eeprom Memory
16 Bytes
Input Output
5
Memory Type
OTP
Number Of Bits
8
Package Type
8-pin SOIC
Programmable Memory
1.5K Bytes
Ram Size
41 Bytes
Speed
4 MHz
Timers
1-8-bit
Voltage, Range
3-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE519-04I/SM
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC12CE519-04I/SM
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC12C5XX
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
DS40139E-page 50
Before Instruction
After Instruction
Before Instruction
After Instruction
FLAG_REG = 0x0A
FLAG_REG = 0x8A
PC
if FLAG<1>
PC
if FLAG<1>
PC
Bit Set f
[ label ] BSF
0
0
1
Bit ’b’ in register ’f’ is set.
1
1
BSF
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
If bit ’b’ in register ’f’ is 0 then the next
instruction is skipped.
If bit ’b’ is 0 then the next instruction
fetched during the current instruction
execution is discarded, and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0110
0101
f
b
f
b
=
=
=
=
=
(f<b>)
31
31
7
7
FLAG_REG,
BTFSC
GOTO
address (HERE)
0,
address (TRUE);
1,
address(FALSE)
bbbf
bbbf
f,b
FLAG,1
PROCESS_CODE
ffff
ffff
7
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
PC
If FLAG<1>
PC
if FLAG<1>
PC
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0111
f
b < 7
=
=
=
=
=
31
1999 Microchip Technology Inc.
BTFSS
GOTO
address (HERE)
0,
address (FALSE);
1,
address (TRUE)
bbbf
FLAG,1
PROCESS_CODE
ffff

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