LMH6553MR National Semiconductor, LMH6553MR Datasheet - Page 6

• Manufacturer Part Number: LMH6553MR
• Description: DIFF AMP, 900MHZ, 8PSOP, POWERWISE
• Manufacturer: National Semiconductor

Specifications of LMH6553MR

• No. Of Amplifiers: 1
• Gain Db Max: 1dB
• Bandwidth: 900MHz
• Slew Rate: 2300V/µs
• Supply Voltage Range: 4.5V To 12V
• Supply Current: 29.1mA
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes

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Miscellaneous Performance
Z
PSRR
I
Symbol
S
T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that T
T
Individual parameters are tested as noted.
Note 3: The maximum power dissipation is a function of T
P
Note 4: The maximum output current (I
for more details.
Note 5: Human Body Model, applicable std. MIL-STD-883, Method 30157. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC). Field-
Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 6: Short circuit current should be limited in duration to no more than 10 seconds. See the Power Dissipation section of the Application Information for more
details.
Note 7: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 8: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality
Control (SQC) methods.
Note 9: Negative current implies current flowing out of the device.
Note 10: I
Note 11: Exceeding limits could result in excessive device current.
Note 12: Linearity Guardband is defined for an output sinusoid (f = 75 MHz, V
where the SFDR is decreased by 3 dB.
Note 13: Clamp Overshoot Width is the duration of overshoot in a 100% overdrive condition.
J
D
> T
= (T
A
. See Applications Section for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation.
J(MAX)
Input Bias Current
Voltage Range
CMRR
Input Resistance
Gain
Open Loop Transimpedance
Power Supply Rejection Ratio
Supply Current
BI
is referred to a differential output offset voltage by the following relationship: V
– T
A
) / θ
JA
. All numbers apply for packages soldered directly onto a PC Board.
Parameter
J
= T
A
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where
OUT
) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Section
V
Measure V
ΔV
Differential
DC, ΔV
R
CM
L
J(MAX)
O,CM
=
= 0, (Note 9)
∞
, θ
/ΔV
S
JA
= ±1V
. The maximum allowable power dissipation at any ambient temperature is
OD
CM
, V
ID
Conditions
OD
= 0V
6
= 2 V
PP
). It is the difference between the V
OD(offset)
= I
BI
*2R
F
(Note 8)
±0.75
0.995
Min
23
CLAMP
(Note 7)
level and the peak output voltage
±0.81
−3.5
1.00
26.5
Typ
200
105
84
85
(Note 8)
1.008
Max
30
34
Units
dBΩ
V/V
mA
kΩ
µA
dB
dB
V