IRS2548DSTRPBF International Rectifier, IRS2548DSTRPBF Datasheet - Page 16

• Manufacturer Part Number: IRS2548DSTRPBF
• Description: IC, LED DRVR, SOIC-14
• Manufacturer: International Rectifier

Specifications of IRS2548DSTRPBF

• Led Driver Application: General Lighting
• Topology: Boost (Step Up)
• No. Of Outputs: 1
• Output Current: 500mA
• Output Voltage: 16.6V
• Dimming Control Type: PWM
• Operating Temperature Range: -55°C To +150°C
• Rohs Compliant: Yes
• Driver Case Style: SOIC
• Switching Frequency: 44.5kHz
• Msl: MSL 2 - 1 Year
• Package: 14-lead SOIC
• Circuit: PFC Ballast Control and Half-Bridge Driver
• Offset Voltage (v): 600
• Output Source Current Min (ma): 500
• Output Sink Current Min (ma): 500
• Pbf: Yes
• V Bsuv+ (v): 9.0
• V Ccuv+ (v): 12.5
• V Ccuv- (v): 10.5
• T R (ns): 120
• T F (ns): 50
• Application: SMPS/Lighting
• Lead Free Status / Rohs Status: Compliant

www.irf.com
Figure 10: IRS2548D simplified PFC control
circuit.
The VBUS pin is regulated against a fixed internal
4V reference voltage for regulating the DC bus
voltage (Figure 11). The feedback loop is performed
by an operational transconductance amplifier (OTA)
that sinks or sources a current to the external
capacitor at the COMP pin. The resulting voltage on
the COMP pin sets the threshold for the charging of
the internal timing capacitor (C1, Figure 11) and
therefore determines the on-time of MPFC.
The off-time of MPFC is determined by the time it
takes the LPFC current to fall to zero. A positive-
going edge at the ZX input exceeding the internal
2V threshold (VZXTH+) signals the beginning of the
off-time and the following negative-going edge
falling below 1.7V (VZXTH+ - VZXHYS)
when the LPFC current discharges to zero which
signals the end of the off-time and MPFC is turned
on again (Figure 12). The cycle repeats itself
indefinitely until the PFC section is disabled due to
a fault detected by the system section (Fault
Mode), an over-voltage on the DC bus or the
Figure 11: IRS2548D detailed PFC control
circuit.
(+)
(-)
RVBUS1
RVBUS2
RVBUS
VBUS
COMP
CCOMP
Control
PFC
LPFC
COM
PFC
ZX
OC
RZX
RPFC
MPFC
ROC
DFPC
CBUS
occurs
16
Figure 12: Inductor current, PFC pin, ZX pin and
OC pin timing diagram.
On-time Modulation Circuit
A fixed on-time of MPFC over an entire cycle of the
line input voltage produces a peak inductor current
which naturally follows the sinusoidal shape of the
line input voltage. The smoothed averaged line input
current is in phase with the line input voltage for high
power factor but some harmonic distortion is left.
This is mostly due to cross-over distortion of the line
current near the zero-crossings of the line input
voltage. To achieve lower harmonics that comply
with international standards such as EN61000-3-2
class C and general market requirements an
additional on-time modulation circuit in included in
the PFC control. This circuit dynamically increases
the on-time of MPFC as the line input voltage nears
the zero-crossings (Figure 13). This causes the
peak LPFC current and therefore the smoothed line
input current to increase slightly near the zero-
crossings of the line input voltage to compensate for
cross over distortion which reduces the THD and
higher harmonics.
negative transition of ZX pin voltage does not
occur. Should the negative edge at ZX not be
detected, MPFC will remain off until the watch-dog
timer forces it to turn-on again after a fixed delay.
Should the OC pin exceed the 1.2V (VOCTH+)
over-current threshold during the on-time, the PFC
output will turn off. The circuit will then wait for a
negative-going transition on the ZX pin or a forced
turn-on from the watch-dog timer to turn the PFC
output on again.
PFC
I
OC
LPFC
ZX
1.2V
. . .
. . .
. . .
. . .
© 2011 International Rectifier
IRS2548D