MAX5075AAUA-T Maxim Integrated Products, MAX5075AAUA-T Datasheet - Page 5

• Manufacturer Part Number: MAX5075AAUA-T
• Description: MOSFET & Power Driver ICs Push-Pull FET Driver w/Osc & Clock
• Manufacturer: Maxim Integrated Products
• Type: Low Sider

Specifications of MAX5075AAUA-T

• Rise Time: 10 ns
• Fall Time: 10 ns
• Supply Voltage (min): 4.5 V
• Supply Current: 1 mA
• Maximum Power Dissipation: 825 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 2
• Number Of Outputs: 2

Figure 1. MAX5075 Functional Diagram
Push-Pull FET Driver with Integrated Oscillator
PIN
EP
1
2
3
4
5
6
7
8
DGND
CLK
RT
NDRV1
NDRV2
NAME
DGND
PGND
CLK
V
I.C.
_______________________________________________________________________________________
RT
EP
CC
LDO
V
5V
CC
Synchronizing Clock Output. Clock output with a ±10mA peak current drive that can be used to
synchronize an external PWM regulator. CLK/NDRV1 frequency has a 1x, 2x, or 4x ratio. See the
Synchronizing Clock Output section.
Internal Connection. Connect to ground. Internal function.
Oscillator Timing Resistor Connection. Bypass RT with a series combination of a 4.7kΩ resistor and a
1nF capacitor to DGND. Connect a resistor from RT to DGND to set the internal oscillator.
Digital Ground. Connect DGND to ground plane.
Power Ground. Connect PGND to ground plane.
Gate Driver 1. Connect NDRV1 to the gate of the external n-channel FET.
Gate Driver 2. Connect NDRV2 to the gate of the external n-channel FET.
Power-Supply Input. Bypass V
Exposed Pad. Internally connected to DGND. Connect exposed pad to ground plane.
OSC
B (2x)
C (4x)
A (1x)
Q
Q
Q
Q
CC
MAX5075
to PGND with 0.1µF
FUNCTION
T-FF
Q
Q
||
and Clock Output
1µF ceramic capacitors.
UVLO 3.5V
FUNCTION
INTERNAL
Pin Description
V
NDRV2
NDRV1
PGND
I.C.
CC
5