HV9123NG Supertex, HV9123NG Datasheet - Page 5

Switching Converters, Regulators & Controllers HVCMOS 450V 2% Ref

HV9123NG

Manufacturer Part Number
HV9123NG
Description
Switching Converters, Regulators & Controllers HVCMOS 450V 2% Ref
Manufacturer
Supertex
Datasheet

Specifications of HV9123NG

Output Voltage
4.08 V
Mounting Style
SMD/SMT
Package / Case
SOIC-16
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HV9123NG
Manufacturer:
SUPERTEX
Quantity:
20 000
Test Circuits
Note:
Detailed Description
Preregulator
The preregulator/startup circuit for the HV9123 consists of
a high-voltage n-channel depletion-mode DMOS transistor
driven by an error amplifier to form a variable current path
between the VIN terminal and the VDD terminal. Maximum
current (about 20 mA) occurs when V
ducing as V
rises to somewhere between 7.8 and 9.4V, so that if V
held at 10 or 12V by an external source (generally the sup-
ply the chip is controlling), no current other than leakage is
drawn through the high voltage transistor. This minimizes
dissipation.
An external capacitor between VDD and VSS is generally
required to store energy used by the chip in the time be-
tween shutoff of the high voltage path and the VDD supply’s
output rising enough to take over powering the chip. This
capacitor should have a value of 100X or more the effective
gate capacitance of the MOSFET being driven, i.e.,
C
as well as very good high frequency characteristics. Stacked
polyester or ceramic caps work well. Electrolytic capacitors
are generally not suitable. A common resistor divider string
is used to monitor V
cuit and the shutoff circuit of the high voltage FET. Setting
the undervoltage sense point about 0.6V lower on the string
than the FET shutoff point guarantees that the undervoltage
lockout always releases before the FET shuts off.
Bias Circuit
An external bias resistor, connected between the bias pin
and VSS is required by the HV9123 to set currents in a se-
ries of current mirrors used by the analog sections of the
chip. Nominal external bias current requirement is 15 to
STORAGE
Set feedback voltage so that V
+10V
(V
(–V
GND
DD
(FB)
IN
)
≥ 100 x (gate charge of FET at 10V)
)
DD
rises. This path shuts off altogether when V
Reference
DD
0.1µF
for both the undervoltage lockout cir-
COMP
Error Amp Z
+
= V
DIVIDE
1.0V swept 100Hz – 2.2MHz
± 1.0mV before connecting transformer.
1235 Bordeaux Drive, Sunnyvale, CA 94089
V
DD
1
OUT
= 0, with current re-
secondary)
Tektronix
P6021
(1 turn
V
2
DD
60.4K
40.2K
DD
is
5
20µA, which can be set by a 390 to 510KΩ resistor if a 10V
V
precision resistor is not required; ± 5% is fine.
Clock Oscillator
The clock oscillator of the HV9123 consists of a ring of
CMOS inverters, timing capacitors, and a capacitor dis-
charge FET. A single external resistor between the OSC IN
and OSC OUT pins is required to set oscillator frequency
(see graph). The discharge can either be connected to VSS
directly or connected to VSS through a resistor used to set
a dead time.
One difference exists between the Supertex HV9123 and
competitive 9123s: The oscillator is shut off when a shutoff
command is received. This saves about 150µA of quiescent
current, which aids in the construction of power supplies
to meet CCITT specification I-430, and in other situations
where an absolute minimum of quiescent power dissipation
is required.
Reference
The Reference of the HV9123 consists of a stable bandgap
reference followed by a buffer amplifier which scales the
voltage up to approximately 4.0V. The scaling resistors of
the reference buffer amplifier are trimmed during manufac-
ture so that the output of the error amplifier, when connected
in a gain of -1 configuration, is as close to 4.0V as possible.
This nulls out any input offset of the error amplifier. As a con-
sequence, even though the observed reference voltage of a
specific part may not be exactly 4.0V, the feedback voltage
required for proper regulation will be.
A ≈ 50KΩ resistor is placed internally between the output
of the reference buffer amplifier and the circuitry it feeds
DD
is used, or a 510 to 680KΩ resistor if V
0.1V swept 10Hz – 1MHz
Tel: 408-222-8888
10.0V
4.00V
Reference
100K1%
www.supertex.com
0.1µF
PSRR
+
100K1%
DD
HV9123
will be 12V. A
V
2
V
1

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