SCAN92LV090SLC/NOPB National Semiconductor, SCAN92LV090SLC/NOPB Datasheet - Page 11

• Manufacturer Part Number: SCAN92LV090SLC/NOPB
• Description: IC TXRX LVDS 9CH W/SCAN 64FBGA
• Manufacturer: National Semiconductor
• Series: SCANr
• Type: Transceiverr

Specifications of SCAN92LV090SLC/NOPB

• Number Of Drivers/receivers: 9/9
• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 64-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *SCAN92LV090SLC; *SCAN92LV090SLC/NOPB; SCAN92LV090SLC

Description of Boundary-Scan
Circuitry
The SCAN92LV090 features two unique Scan test modes,
each which requires a unique BSDL model depending on the
level of test access and fault coverage goals. In the first mode
(Mode0), only the TTL Inputs and Outputs of each transceiver
are accessible via a 1149.1 compliant protocol. In the second
mode (Mode1), both the TTL Inputs and Outputs and the dif-
ferential LVDS I/Os are included in the Scan chain.
All test modes are handled by the ATPG software, and BSDL
selection should be invisible to the user.
The BYPASS register is a single bit shift register stage iden-
tical to scan cell TYPE1. It captures a fixed logic low.
The INSTRUCTION register is an eight-bit register which
captures the value 00111101.
Mode 0 Boundary Scan Register Configuration
(Refer to the BSDL for exact register order)
Bypass Register Scan Chain Definition
Logic 0
10124209
10124221
11
00000000
10000010
10000111
00000110
All Others
10011001
10010010
10001111
00000110
All Others
Mode 1 Boundary Scan Register Configuration
(Refer to the BSDL for exact register order)
Instruction Code
Instruction Code
Instruction Register Scan Chain Definition
MSB
MSB
→
→
LSB (Mode0)
LSB (Mode1)
SAMPLE/PRELOAD
SAMPLE/PRELOAD
Instruction
Instruction
BYPASS
BYPASS
EXTEST
EXTEST
CLAMP
CLAMP
HIGHZ
HIGHZ
www.national.com
10124220
10124210