SI5110-H-GL Silicon Laboratories Inc, SI5110-H-GL Datasheet - Page 25

• Manufacturer Part Number: SI5110-H-GL
• Description: IC TXRX SONET/SDH LP HS 99LFBGA
• Manufacturer: Silicon Laboratories Inc
• Series: SiPHY®r
• Type: Transceiverr

Specifications of SI5110-H-GL

• Package / Case: 99-LFBGA
• Number Of Drivers/receivers: 1/1
• Protocol: SONET/SDH
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Product: PHY
• Supply Voltage (max): 1.89 V, 3.47 V
• Supply Voltage (min): 1.71 V
• Supply Current: 0.7 A
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1300 mW
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

17. Pin Descriptions: Si5110
B2, C2, D1,
Number(s)
G1, H2, J2,
E2, E7–9,
F2, F7–9,
Pin
H3
H6
H7
H5
K1
H8
D2
B3
J5
FIFOERR
FIFORST
BWSEL1
BWSEL0
LOSLVL
Name
DLBK
LLBK
GND
LOS
GND
I/O
O
O
I
I
I
I
I
Signal Level
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Rev. 1.4
Transmit DSPLL Bandwidth Select.
The inputs select loop bandwidth of the Transmit
Clock Multiplier DSPLL as listed in Table 6.
Note: Both inputs have an internal pulldown.
Diagnostic Loopback.
When this input is low, the transmit clock and data are
looped back for output on RXDOUT, RXCLK1 and
RXCLK2. This pin should be held high for normal
operation.
Note: This input has an internal pullup.
FIFO Error.
This output is asserted (driven low) when a FIFO over-
flow/underflow has occurred. This output is low until
reset by asserting FIFORST.
FIFO RESET.
When this input is low, the read/write FIFO pointers
are reset to their initial state.
Note: This input has an internal pullup.
Supply Ground.
Connect to system GND. Ensure a very low
impedance path for optimal performance.
Line Loopback.
When this input is low, the recovered clock and data
are looped back for output on TXDOUT, and TXCLK-
OUT. Set this pin high for normal operation.
Note: This input has an internal pullup.
Loss-of-Signal.
This output is asserted (driven low) when the peak-to-
peak signal amplitude on RXDIN is below the thresh-
old set via LOSLVL.
LOS Threshold Level.
Applying an analog voltage to this pin allows adjust-
ment of the Threshold used to declare LOS. Tieing
this input to VREF disables LOS detection and forces
the LOS output high.
Description
Si5110
25