IDT70V24S55PFG IDT, Integrated Device Technology Inc, IDT70V24S55PFG Datasheet - Page 17

• Manufacturer Part Number: IDT70V24S55PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT70V24S55PFG

• Density: 64Kb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 24b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 180mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 16b
• Number Of Words: 4K
• Lead Free Status / Rohs Status: Compliant

AC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range for 70V25/24
NOTES:
1. Port-to-port delay through SRAM cells from writing port to reading port, refer to "TIMING WAVEFORM OF WRITE PORT-TO-PORT READ AND
2. To ensure that the earlier of the two ports wins.
3. t
4. To ensure that the write cycle is inhibited during contention.
5. To ensure that a write cycle is completed after contention.
6. 'X' in part number indicates power rating (S or L).
PORT-TO-PORT DELAY TIMING
PORT-TO-PORT DELAY TIMING
BUSY TIMING (M/S = V
t
t
t
t
t
t
t
BUSY TIMING (M/S = V
t
t
t
t
BUSY TIMING (M/S = V
t
t
t
t
t
t
t
BUSY TIMING (M/S = V
t
t
t
t
BAA
BDA
BAC
BDC
APS
BDD
WH
WB
WH
WDD
DDD
BAA
BDA
BAC
BDC
APS
BDD
WH
WB
WH
WDD
DDD
IDT70V35/34S/L (IDT70V25/24S/L)
High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
Symbol
Symbol
BUSY (M/S = V
BDD
is a calculated parameter and is the greater of 0, t
BUSY Access Time from Address Match
BUSY Disable Time from Address Not Matched
BUSY Access Time from Chip Enable LOW
BUSY Disable Time from Chip Enable HIGH
Arbitration Priority Set-up Time
BUSY Disable to Valid Data
Write Hold After BUSY
BUSY Input to Write
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
BUSY Access Time from Address Match
BUSY Disable Time from Address Not Matched
BUSY Access Time from Chip Enable LOW
BUSY Disable Time from Chip Enable HIGH
Arbitration Priority Set-up Time
BUSY Disable to Valid Data
Write Hold After BUSY
BUSY Input to Write
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
IH
)".
IH
IL
IH
IL
)
)
)
)
(4)
(4)
(5)
(5)
(5)
(5)
(1)
(1)
(3)
(3)
(2)
(2)
Parameter
(1)
(1)
WDD
Parameter
– t
WP
(actual) or t
6.42
DDD
17
– t
DW
(actual).
Min.
____
____
____
____
____
____
____
12
12
70V25/24X15
5
0
Com'l Ony
Max.
Industrial and Commercial Temperature Ranges
____
____
____
____
30
25
15
15
15
15
18
Min.
Min.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
15
15
70V25/24X20
25
25
5
0
70V25/24X35
5
0
Com'l Only
(6)
Com'l
& Ind
Max.
Max.
____
____
____
____
20
20
20
30
45
35
____
____
____
____
17
20
20
20
20
35
60
45
Min.
Min.
____
____
____
____
____
____
____
17
17
____
____
____
____
____
____
____
70V25/24X25
25
25
5
0
70V25/24X55
5
0
Com'l Only
Com'l
& Ind
Max.
Max.
____
____
____
____
20
20
20
30
50
35
17
____
____
____
____
45
40
40
35
40
80
65
5624 tbl 13a
5624 tbl 13b
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns