PIC16C505-04I/P Microchip Technology Inc., PIC16C505-04I/P Datasheet - Page 26

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PIC16C505-04I/P

Manufacturer Part Number
PIC16C505-04I/P
Description
14 PIN, 1.5 KB OTP, 72 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16C505-04I/P

Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
11
Memory Type
OTP
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
1.5K Bytes
Ram Size
72 Bytes
Speed
4 MHz
Timers
1- 8-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16C505
6.2
An 8-bit counter is available as a prescaler for the
Timer0 module or as a postscaler for the Watchdog
Timer (WDT), respectively (Section 7.6). For simplicity,
this counter is being referred to as “prescaler”
throughout this data sheet. Note that the prescaler
may be used by either the Timer0 module or the WDT,
but not both. Thus, a prescaler assignment for the
Timer0 module means that there is no prescaler for
the WDT, and vice-versa.
The PSA and PS<2:0> bits (OPTION<3:0>) determine
prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing
MOVWF 1, BSF 1,x, etc.) will clear the prescaler.
When assigned to WDT, a CLRWDT instruction will
clear the prescaler along with the WDT. The prescaler
is neither readable nor writable. On a RESET, the
prescaler contains all '0's.
6.2.1
The prescaler assignment is fully under software
control (i.e., it can be changed “on-the-fly” during
program execution). To avoid an unintended device
FIGURE 6-5:
DS40192C-page 26
Note: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register.
to
Prescaler
SWITCHING PRESCALER ASSIGNMENT
WDT Enable bit
Watchdog
RC5/T0CKI
the
Timer
T
CY
Pin
( = Fosc/4)
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
TMR0
T0SE
register
0
1
PSA
M
U
X
(e.g.,
0
1
T0CS
M
U
X
CLRF 1,
8-bit Prescaler
0
8 - to - 1MUX
Time-Out
8
MUX
WDT
1
0
1
PSA
RESET,
(Example 6-1) must be executed when changing the
prescaler assignment from Timer0 to the WDT.
EXAMPLE 6-1:
To change prescaler from the WDT to the Timer0
module, use the sequence shown in Example 6-2.
This sequence must be used even if the WDT is
disabled. A CLRWDT instruction should be executed
before switching the prescaler.
EXAMPLE 6-2:
CLRWDT
MOVLW
OPTION
M
U
X
1.CLRWDT
2.CLRF
3.MOVLW
4.OPTION
5.CLRWDT
6.MOVLW
7.OPTION
PSA
'xxxx0xxx'
PS<2:0>
the
TMR0
'00xx1111’b ;These 3 lines (5, 6, 7)
'00xx1xxx’b ;Set Postscaler to
Cycles
Sync
2
following
CHANGING PRESCALER
(TIMER0 WDT)
CHANGING PRESCALER
(WDT TIMER0)
1999 Microchip Technology Inc.
;Clear WDT
;Clear TMR0 & Prescaler
; desired
;PS<2:0> are 000 or 001
; are required only if
; desired WDT rate
;Clear WDT and
;prescaler
;Select TMR0, new
;prescale value and
;clock source
TMR0 reg
Data Bus
instruction
8
sequence

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