AC244026 Microchip Technology, AC244026 Datasheet - Page 185
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AC244026
Manufacturer Part Number
AC244026
Description
Processor Extension Pak (PIC16F727-ICE) 200K Device Emulator - Debugger Accessor
Manufacturer
Microchip Technology
Series
-r
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of AC244026
Accessory Type
Debug Interface Module
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
PIC16LF727
- Current page: 185 of 302
- Download datasheet (5Mb)
17.2.10
When the CKP bit is cleared, the SCL output is held low
once it is sampled low. therefore, the CKP bit will not
stretch the SCL line until an external I
has already asserted the SCL line low. The SCL output
will remain low until the CKP bit is set and all other
devices on the I
ensures that a write to the CKP bit will not violate the
minimum
(Figure 17-14).
FIGURE 17-14:
© 2009 Microchip Technology Inc.
SSPCON
SDA
CKP
SCL
WR
CLOCK SYNCHRONIZATION
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
high
2
C bus have released SCL. This
time
CLOCK SYNCHRONIZATION TIMING
requirement
DX
2
C master device
for
Master device
asserts clock
SCL
PIC16F72X/PIC16LF72X
17.2.11
While in Sleep mode, the I
addresses of data, and when an address match or
complete byte transfer occurs, wake the processor
from Sleep (if SSP interrupt is enabled).
Master device
deasserts clock
SLEEP OPERATION
2
C module can receive
DS41341E-page 185
DX-1
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