ADIS16407/PCBZ Analog Devices Inc, ADIS16407/PCBZ Datasheet - Page 10
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ADIS16407/PCBZ
Manufacturer Part Number
ADIS16407/PCBZ
Description
ADIS16407/PCB EVAL. BD.
Manufacturer
Analog Devices Inc
Series
iMEMS®, iSensor™r
Specifications of ADIS16407/PCBZ
Sensor Type
Accelerometer, Gyroscope, Magnetometer, 3 Axis
Sensing Range
±18g, ±75°/sec, ±150°/sec, ±300°/sec, ±2.5gauss
Interface
SPI Serial
Sensitivity
3.33mg/LSB, 0.0125 ~ 0.05°/sec/LSB, 0.5mgauss/LSB
Voltage - Supply
4.75 V ~ 5.25 V
Embedded
No
Utilized Ic / Part
ADIS16407
Kit Application Type
Sensing - Motion / Vibration / Shock
Application Sub Type
Shock Sensor
Silicon Manufacturer
Analog Devices
Silicon Core Number
ADIS16407
Kit Contents
Board, Manual
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ADIS16407
BASIC OPERATION
The ADIS16407 is an autonomous system that requires no user
initialization. When it has a valid power supply, it initializes itself
and starts sampling, processing, and loading sensor data into
the output registers at a sample rate of 819.2 SPS. DIO1 pulses
high after each sample cycle concludes. The SPI interface enables
simple integration with many embedded processor platforms,
as shown in Figure 9 (electrical connection) and Table 6 (pin
functions).
Table 6. Generic Master Processor Pin Names and Functions
Pin Name
SS
SCLK
MOSI
MISO
IRQ
The ADIS16407 SPI interface supports full duplex serial commu-
nication (simultaneous transmit and receive) and uses the bit
sequence shown in Figure 13. Table 7 provides a list of the most
common settings that require attention to initialize the serial
port of a processor for the ADIS16407 SPI interface.
Table 7. Generic Master Processor SPI Settings
Processor Setting
Master
SCLK Rate ≤ 2 MHz
SPI Mode 3
MSB-First Mode
16-Bit Mode
1
For burst read, SCLK rate ≤ 1 MHz.
SYSTEM
PROCESSOR
SPI MASTER
VDD
DOUT
SCLK
DIN
Figure 9. Electrical Connection Diagram
CS
I/O LINES ARE COMPATIBLE WITH
1
SCLK
NOTES
1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0]
2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED.
MOSI
MISO
3.3V OR 5V LOGIC LEVELS
IRQ
SS
IN THE PREVIOUS 16-BIT DIN SEQUENCE WHEN R/W = 0.
Function
Slave select
Serial clock
Master output, slave input
Master input, slave output
Interrupt request
Description
The ADIS16407 operates as a slave
Maximum serial clock rate
CPOL = 1 (polarity), CPHA = 1 (phase)
Bit sequence
Shift register/data length
D15
R/W
D14
A6
D13
A5
6
3
5
4
7
CS
SCLK
DIN
DOUT
DIO1
D12
A4
10
13
D11
A3
ADIS16407
5V
11
14
D10
A2
Figure 13. SPI Communication Bit Sequence
12
15
A1
D9
A0
D8
Rev. B | Page 10 of 24
DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
D7
D6
D5
READING SENSOR DATA
The ADIS16407 provides two different options for acquiring
sensor data: single register and burst register. A single register
read requires two 16-bit SPI cycles. The first cycle requests the
contents of a register using the bit assignments in Figure 13.
Bit DC7 to Bit DC0 are don’t care for a read, and then the output
register contents follow on DOUT during the second sequence.
Figure 10 includes three single register reads in succession. In
this example, the process starts with DIN = 0x0400 to request
the contents of XGYRO_OUT, then follows with 0x0600 to
request YGYRO_OUT and 0x0800 to request ZGYRO_OUT.
Full duplex operation enables processors to use the same 16-bit
SPI cycle to read data from DOUT while requesting the next set
of data on DIN. Figure 11 provides an example of the four SPI
signals when reading XGYRO_OUT in a repeating pattern.
Burst Read Function
The burst read function enables the user to read all output registers
using one command on the DIN line and shortens the stall time
between each 16-bit segment to one SCLK cycle (see Table 2).
Figure 12 provides the burst read sequence of data on each SPI
signal. The sequence starts with writing 0x3E00 to DIN, followed
by each output register clocking out on DOUT, in the order in
which they appear in Table 8.
DOUT
SCLK
DIN
DOUT
CS
SCLK
DOUT
D4
DIN
DIN
CS
DOUT = 1111 1001 1101 1010 = 0xF9DA = –1574 LSBs => –19.675°/sec
D3
Figure 11. Example SPI Read, Second 16-Bit Sequence
0x0400
0x3E00
D2
1
D1
Figure 12. Burst Read Sequence
Figure 10. SPI Read Example
SUPPLY_OUT
D0
XGYRO_OUT
0x0600
2
DON’T CARE
DIN = 0000 0100 0000 0000 = 0x0400
D15
XGYRO_OUT
R/W
YGYRO_OUT
0x0800
3
D14
A6
D13
A5
ZGYRO_OUT
AUX_ADC
15