S29GL512S10DHI020 Spansion Inc., S29GL512S10DHI020 Datasheet - Page 27

• Manufacturer Part Number: S29GL512S10DHI020
• Description: IC 512 MBIT, 3V, 100NS, 64-BALL FBGA, PAGE MODE
• Manufacturer: Spansion Inc.

Specifications of S29GL512S10DHI020

• Lead Free Status / Rohs Status: Supplier Unconfirmed

5.3
February 11, 2011 S29GL_128S_01GS_00_01
5.2.3
5.3.1
5.3.1.1
Command Set
Automatic ECC
Program Methods
Each 32 byte Page has a hidden ECC value. In combination with Error Detection and Correction (EDC) logic,
the ECC is used to detect and correct any single bit error found during a read access.
If a Write Buffer Programming operation is the first one applied to a Page, the ECC for the entire Page is also
programmed. If programming is done more than once to a particular Page, the ECC for that Page will be
disabled until the next time the sector containing that Page is erased and reprogrammed. The Word
Programming command always disables ECC on the Page programmed.
Thus, incremental bit or word programming (bit-walking) is allowed but has the effect of disabling the flash
device internal error correction capability on the Page where incremental programming is done.
These are automatic operations transparent to the user. The transparency of the Automatic ECC feature
enhances data integrity for typical programming operations which write data once to each Page but, facilitates
software compatibility to previous generations of GL family of products by still allowing for single word
programming and bit walking in which the same Page is programmed more than once. When a Page has
Automatic ECC disabled, EDC is not done on data read from the Page location.
Word Programming
Word programming is used to program a single word anywhere in the main Flash Memory Array.
Programming using this command will disable Automatic ECC protection on the Page where the word or bit is
located. A sector erase is needed to again enable Automatic ECC on that Page.
The Word Programming command is a four-write-cycle sequence. The program command sequence is
initiated by writing two unlock write cycles, followed by the program set up command. The program address
and data are written next, which in turn initiate the Embedded Word Program algorithm. The system is not
required to provide further controls or timing. The device automatically generates the program pulses and
verifies the programmed cell margin internally. When the Embedded Word Program algorithm is complete,
the EAC then returns to its standby mode.
The system can determine the status of the program operation by using Data Polling Status, reading the
Status Register, or monitoring the RY/BY# output. See
status bits. See
on page 28
Any commands other than Program Suspend written to the device during the Embedded Program algorithm
are ignored. Note that a hardware reset (RESET# = V
returns to read mode after t
reinitiated once the device has completed the hardware reset operation.
The Word Programming command may also be used when the SSR ASO is entered.
A modified version of the Word Programming command, without unlock write cycles, is used for programming
when entered into the Lock Register, Password, and PPB ASOs. The same command is used to change
volatile bits when entered in to the PPB Lock, and DYB ASOs. See
command sequences.
D a t a
for a diagram of the programming operation.
S h e e t
Data Polling Status on page 40
( A d v a n c e
RPH
time. To ensure data integrity, the Program command sequence should be
GL-S MirrorBit
I n f o r m a t i o n )
for information on these status bits. See
®
Family
IL
Status Register on page 38
) immediately terminates the programming operation
Table 6.1 on page 57
for information on these
Figure 5.1
for program
27