PIC32MX695F512L-80V/BG Microchip Technology, PIC32MX695F512L-80V/BG Datasheet - Page 173
![512 KB Flash, 128 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX695F512L-80V/BG
Manufacturer Part Number
PIC32MX695F512L-80V/BG
Description
512 KB Flash, 128 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX695F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
128 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX695F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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28.2
This section describes the operation of the WDT and
Power-up Timer of the PIC32MX5XX/6XX/7XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
FIGURE 28-1:
© 2009-2011 Microchip Technology Inc.
WDTCLR = 1
WDT Enable
WDT Enable
Reset Event
Watchdog Timer (WDT)
PWRT Enable
Oscillator
WDT Enable
LPRC
Wake
WATCHDOG AND POWER-UP TIMER BLOCK DIAGRAM
WDT Counter Reset
Clock
25-bit Counter
FWDTPS<4:0> (DEVCFG1<20:16>)
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
PIC32MX5XX/6XX/7XX
1:64 Output
25
1
Decoder
PWRT Enable
Power Save
0
1
LPRC
Control
PWRT
Device Reset
NMI (Wake-up)
DS61156G-page 173
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